From f3989abdbfd96ac35e53940f083c8789a0adb019 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Tue, 7 Jul 2009 23:28:46 +0000 Subject: SelectionDAG::SignBitIsZero doesn't work right for vectors, for now, conservatively return false. llvm-svn: 74969 --- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'llvm/lib/CodeGen/SelectionDAG') diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index 5f45c980a58..c46eee8a4ed 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -1516,6 +1516,10 @@ SDValue SelectionDAG::FoldSetCC(MVT VT, SDValue N1, /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We /// use this predicate to simplify operations downstream. bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { + // This predicate is not safe for vector operations. + if (Op.getValueType().isVector()) + return false; + unsigned BitWidth = Op.getValueSizeInBits(); return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); } -- cgit v1.2.3