From 4dc034df1d8304e203c46b0cc112f150ed82e987 Mon Sep 17 00:00:00 2001 From: Devang Patel Date: Mon, 27 Jun 2011 22:32:04 +0000 Subject: During bottom up fast-isel, instructions emitted to materalize registers are at top of basic block and do not have debug location. This may misguide debugger while entering the basic block and sometimes debugger provides semi useful view of current location to developer by picking up previous known location as current location. Assign a sensible location to the first instruction in a basic block, if it does not have one location derived from source file, so that debugger can provide meaningful user experience to developers in edge cases. llvm-svn: 133953 --- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 2 ++ 1 file changed, 2 insertions(+) (limited to 'llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp') diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index dc8044b7a7f..7a9439f4d57 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -964,6 +964,8 @@ void SelectionDAGISel::SelectAllBasicBlocks(const Function &Fn) { else ++NumFastIselBlocks; + if (FastIS) + FastIS->recomputeDebugLocForMaterializedRegs(); if (Begin != BI) { // Run SelectionDAG instruction selection on the remainder of the block // not handled by FastISel. If FastISel is not run, this is the entire -- cgit v1.2.3