From 0bdc083e213d7addc715f4d93bfbcd3d2a55cb1f Mon Sep 17 00:00:00 2001 From: Eli Friedman Date: Wed, 7 Dec 2011 22:06:02 +0000 Subject: Fix an assertion in the scheduler. PR11386. No testcase included because it's rather delicate. llvm-svn: 146083 --- llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp') diff --git a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp index c2d3dd3d60c..98931289ce2 100644 --- a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp @@ -811,12 +811,11 @@ void ScheduleDAGRRList::UnscheduleNodeBottomUp(SUnit *SU) { for (SUnit::succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); I != E; ++I) { if (I->isAssignedRegDep()) { + if (!LiveRegDefs[I->getReg()]) + ++NumLiveRegs; // This becomes the nearest def. Note that an earlier def may still be // pending if this is a two-address node. LiveRegDefs[I->getReg()] = SU; - if (!LiveRegDefs[I->getReg()]) { - ++NumLiveRegs; - } if (LiveRegGens[I->getReg()] == NULL || I->getSUnit()->getHeight() < LiveRegGens[I->getReg()]->getHeight()) LiveRegGens[I->getReg()] = I->getSUnit(); -- cgit v1.2.3