From 94b9029be9f2cdfef7776c48a18a0117a5ea6fda Mon Sep 17 00:00:00 2001 From: Cameron McInally Date: Mon, 20 Aug 2018 19:28:56 +0000 Subject: [FPEnv] Support constrained FREM intrinsic Differential Revision: https://reviews.llvm.org/D50975 llvm-svn: 340201 --- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 2 ++ 1 file changed, 2 insertions(+) (limited to 'llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp') diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index 36c43691891..3c9316780b5 100644 --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -1094,6 +1094,7 @@ void SelectionDAGLegalize::LegalizeOp(SDNode *Node) { case ISD::STRICT_FSUB: case ISD::STRICT_FMUL: case ISD::STRICT_FDIV: + case ISD::STRICT_FREM: case ISD::STRICT_FSQRT: case ISD::STRICT_FMA: case ISD::STRICT_FPOW: @@ -4188,6 +4189,7 @@ void SelectionDAGLegalize::ConvertNodeToLibcall(SDNode *Node) { RTLIB::DIV_PPCF128)); break; case ISD::FREM: + case ISD::STRICT_FREM: Results.push_back(ExpandFPLibCall(Node, RTLIB::REM_F32, RTLIB::REM_F64, RTLIB::REM_F80, RTLIB::REM_F128, RTLIB::REM_PPCF128)); -- cgit v1.2.3