From b9fa1d24f89d0c34e77dd855797017185ab9ba8d Mon Sep 17 00:00:00 2001
From: Dan Gohman <gohman@apple.com>
Date: Sat, 3 Jan 2009 19:22:06 +0000
Subject: Fix a DAGCombiner abort on an invalid shift count constant. This
 fixes PR3250.

llvm-svn: 61613
---
 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp')

diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 4fb50e30dbe..f1e43a90246 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -3277,6 +3277,8 @@ SDValue DAGCombiner::GetDemandedBits(SDValue V, const APInt &Mask) {
     if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(V.getOperand(1))) {
       // See if we can recursively simplify the LHS.
       unsigned Amt = RHSC->getZExtValue();
+      // Watch out for shift count overflow though.
+      if (Amt >= Mask.getBitWidth()) break;
       APInt NewMask = Mask << Amt;
       SDValue SimplifyLHS = GetDemandedBits(V.getOperand(0), NewMask);
       if (SimplifyLHS.getNode()) {
-- 
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