From 51d9ee3ff6404f65c2838aa37e34da90542117bd Mon Sep 17 00:00:00 2001 From: Bob Wilson Date: Fri, 21 May 2010 21:05:32 +0000 Subject: Change CodeGen/ARM/2009-11-02-NegativeLane.ll to use 16-bit vector elements so that it will continue to test what it was meant to test when I commit a separate change for better support of BUILD_VECTOR and VECTOR_SHUFFLE for Neon. Fix a DAG combiner crash exposed by this test change. llvm-svn: 104380 --- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp') diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 0ea46af2acf..d575e8a4adc 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -6413,6 +6413,13 @@ SDValue DAGCombiner::SimplifyVBinOp(SDNode *N) { break; } + // If the vector element type is not legal, the BUILD_VECTOR operands + // are promoted and implicitly truncated. Make that explicit here. + if (LHSOp.getValueType() != EltType) + LHSOp = DAG.getNode(ISD::TRUNCATE, LHS.getDebugLoc(), EltType, LHSOp); + if (RHSOp.getValueType() != EltType) + RHSOp = DAG.getNode(ISD::TRUNCATE, RHS.getDebugLoc(), EltType, RHSOp); + SDValue FoldOp = DAG.getNode(N->getOpcode(), LHS.getDebugLoc(), EltType, LHSOp, RHSOp); if (FoldOp.getOpcode() != ISD::UNDEF && -- cgit v1.2.3