From 4f4546b73abd417cb2fa3814d9c15461bb553b19 Mon Sep 17 00:00:00 2001 From: Nadav Rotem Date: Sun, 5 Feb 2012 11:39:23 +0000 Subject: Add additional documentation to the extract-and-trunc dagcombine optimization. llvm-svn: 149823 --- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) (limited to 'llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp') diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 48b9a3939e7..d029906fc31 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -4985,9 +4985,14 @@ SDValue DAGCombiner::visitTRUNCATE(SDNode *N) { return N0.getOperand(0); } - // Fold Extract-and-trunc into a narrow extract: - // trunc(extract(x)) -> extract(bitcast(x)) - // We only run this optimization after type legalization (which often + // Fold extract-and-trunc into a narrow extract. For example: + // i64 x = EXTRACT_VECTOR_ELT(v2i64 val, i32 1) + // i32 y = TRUNCATE(i64 x) + // -- becomes -- + // v16i8 b = BITCAST (v2i64 val) + // i8 x = EXTRACT_VECTOR_ELT(v16i8 b, i32 8) + // + // Note: We only run this optimization after type legalization (which often // creates this pattern) and before operation legalization after which // we need to be more careful about the vector instructions that we generate. if (N0.getOpcode() == ISD::EXTRACT_VECTOR_ELT && -- cgit v1.2.3