From 787b77320fc6e376b5a65479dc27bdf6b6548726 Mon Sep 17 00:00:00 2001 From: Bill Wendling Date: Tue, 28 Nov 2006 22:48:48 +0000 Subject: Use llvm streams instead of llvm-svn: 31985 --- llvm/lib/CodeGen/RegAllocSimple.cpp | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) (limited to 'llvm/lib/CodeGen/RegAllocSimple.cpp') diff --git a/llvm/lib/CodeGen/RegAllocSimple.cpp b/llvm/lib/CodeGen/RegAllocSimple.cpp index 088be47e14d..f08b039b82e 100644 --- a/llvm/lib/CodeGen/RegAllocSimple.cpp +++ b/llvm/lib/CodeGen/RegAllocSimple.cpp @@ -190,9 +190,9 @@ void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) { if (op.isRegister() && op.getReg() && MRegisterInfo::isVirtualRegister(op.getReg())) { unsigned virtualReg = (unsigned) op.getReg(); - DEBUG(std::cerr << "op: " << op << "\n"); - DEBUG(std::cerr << "\t inst[" << i << "]: "; - MI->print(std::cerr, TM)); + DOUT << "op: " << op << "\n"; + DOUT << "\t inst[" << i << "]: "; + DEBUG(MI->print(std::cerr, TM)); // make sure the same virtual register maps to the same physical // register in any given instruction @@ -221,8 +221,7 @@ void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) { } } MI->getOperand(i).setReg(physReg); - DEBUG(std::cerr << "virt: " << virtualReg << - ", phys: " << op.getReg() << "\n"); + DOUT << "virt: " << virtualReg << ", phys: " << op.getReg() << "\n"; } } RegClassIdx.clear(); @@ -234,7 +233,7 @@ void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) { /// runOnMachineFunction - Register allocate the whole function /// bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) { - DEBUG(std::cerr << "Machine Function " << "\n"); + DOUT << "Machine Function\n"; MF = &Fn; TM = &MF->getTarget(); RegInfo = TM->getRegisterInfo(); -- cgit v1.2.3