From 90799ce8b2b1fc495235d0a774878ba0972b192d Mon Sep 17 00:00:00 2001 From: Matthias Braun Date: Tue, 23 Aug 2016 21:19:49 +0000 Subject: MachineFunction: Introduce NoPHIs property I want to compute the SSA property of .mir files automatically in upcoming patches. The problem with this is that some inputs will be reported as static single assignment with some passes claiming not to support SSA form. In reality though those passes do not support PHI instructions => Track the presence of PHI instructions separate from the SSA property. Differential Revision: https://reviews.llvm.org/D22719 llvm-svn: 279573 --- llvm/lib/CodeGen/RegAllocFast.cpp | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'llvm/lib/CodeGen/RegAllocFast.cpp') diff --git a/llvm/lib/CodeGen/RegAllocFast.cpp b/llvm/lib/CodeGen/RegAllocFast.cpp index df6e6fb1c5b..febb29c9dd4 100644 --- a/llvm/lib/CodeGen/RegAllocFast.cpp +++ b/llvm/lib/CodeGen/RegAllocFast.cpp @@ -158,6 +158,11 @@ namespace { MachineFunctionPass::getAnalysisUsage(AU); } + MachineFunctionProperties getRequiredProperties() const override { + return MachineFunctionProperties().set( + MachineFunctionProperties::Property::NoPHIs); + } + MachineFunctionProperties getSetProperties() const override { return MachineFunctionProperties().set( MachineFunctionProperties::Property::AllVRegsAllocated); @@ -1093,8 +1098,6 @@ bool RAFast::runOnMachineFunction(MachineFunction &Fn) { UsedInInstr.clear(); UsedInInstr.setUniverse(TRI->getNumRegUnits()); - assert(!MRI->isSSA() && "regalloc requires leaving SSA"); - // initialize the virtual->physical register map to have a 'null' // mapping for all virtual registers StackSlotForVirtReg.resize(MRI->getNumVirtRegs()); -- cgit v1.2.3