From d34e60ca8532511acb8c93ef26297e349fbec86a Mon Sep 17 00:00:00 2001 From: Nicola Zaghen Date: Mon, 14 May 2018 12:53:11 +0000 Subject: Rename DEBUG macro to LLVM_DEBUG. The DEBUG() macro is very generic so it might clash with other projects. The renaming was done as follows: - git grep -l 'DEBUG' | xargs sed -i 's/\bDEBUG\s\?(/LLVM_DEBUG(/g' - git diff -U0 master | ../clang/tools/clang-format/clang-format-diff.py -i -p1 -style LLVM - Manual change to APInt - Manually chage DOCS as regex doesn't match it. In the transition period the DEBUG() macro is still present and aliased to the LLVM_DEBUG() one. Differential Revision: https://reviews.llvm.org/D43624 llvm-svn: 332240 --- llvm/lib/CodeGen/RegAllocBasic.cpp | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) (limited to 'llvm/lib/CodeGen/RegAllocBasic.cpp') diff --git a/llvm/lib/CodeGen/RegAllocBasic.cpp b/llvm/lib/CodeGen/RegAllocBasic.cpp index 1125d2c62be..daeff3fc396 100644 --- a/llvm/lib/CodeGen/RegAllocBasic.cpp +++ b/llvm/lib/CodeGen/RegAllocBasic.cpp @@ -219,8 +219,8 @@ bool RABasic::spillInterferences(LiveInterval &VirtReg, unsigned PhysReg, Intfs.push_back(Intf); } } - DEBUG(dbgs() << "spilling " << printReg(PhysReg, TRI) - << " interferences with " << VirtReg << "\n"); + LLVM_DEBUG(dbgs() << "spilling " << printReg(PhysReg, TRI) + << " interferences with " << VirtReg << "\n"); assert(!Intfs.empty() && "expected interference"); // Spill each interfering vreg allocated to PhysReg or an alias. @@ -292,7 +292,7 @@ unsigned RABasic::selectOrSplit(LiveInterval &VirtReg, } // No other spill candidates were found, so spill the current VirtReg. - DEBUG(dbgs() << "spilling: " << VirtReg << '\n'); + LLVM_DEBUG(dbgs() << "spilling: " << VirtReg << '\n'); if (!VirtReg.isSpillable()) return ~0u; LiveRangeEdit LRE(&VirtReg, SplitVRegs, *MF, *LIS, VRM, this, &DeadRemats); @@ -304,9 +304,8 @@ unsigned RABasic::selectOrSplit(LiveInterval &VirtReg, } bool RABasic::runOnMachineFunction(MachineFunction &mf) { - DEBUG(dbgs() << "********** BASIC REGISTER ALLOCATION **********\n" - << "********** Function: " - << mf.getName() << '\n'); + LLVM_DEBUG(dbgs() << "********** BASIC REGISTER ALLOCATION **********\n" + << "********** Function: " << mf.getName() << '\n'); MF = &mf; RegAllocBase::init(getAnalysis(), @@ -323,7 +322,7 @@ bool RABasic::runOnMachineFunction(MachineFunction &mf) { postOptimization(); // Diagnostic output before rewriting - DEBUG(dbgs() << "Post alloc VirtRegMap:\n" << *VRM << "\n"); + LLVM_DEBUG(dbgs() << "Post alloc VirtRegMap:\n" << *VRM << "\n"); releaseMemory(); return true; -- cgit v1.2.3