From 041230014cfcac43b7a7204ee5ef8c4dd42f599e Mon Sep 17 00:00:00 2001 From: Bill Wendling Date: Fri, 10 Sep 2010 23:34:19 +0000 Subject: Move some of the decision logic for converting an instruction into one that sets the 'zero' bit down into the back-end. There are other cases where this logic isn't sufficient, so they should be handled separately. llvm-svn: 113665 --- llvm/lib/CodeGen/PeepholeOptimizer.cpp | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) (limited to 'llvm/lib/CodeGen/PeepholeOptimizer.cpp') diff --git a/llvm/lib/CodeGen/PeepholeOptimizer.cpp b/llvm/lib/CodeGen/PeepholeOptimizer.cpp index a4ff04bec1c..7a1bf4050df 100644 --- a/llvm/lib/CodeGen/PeepholeOptimizer.cpp +++ b/llvm/lib/CodeGen/PeepholeOptimizer.cpp @@ -240,16 +240,11 @@ bool PeepholeOptimizer::OptimizeCmpInstr(MachineInstr *MI, unsigned SrcReg; int CmpValue; if (!TII->AnalyzeCompare(MI, SrcReg, CmpValue) || - TargetRegisterInfo::isPhysicalRegister(SrcReg) || CmpValue != 0) - return false; - - MachineRegisterInfo::def_iterator DI = MRI->def_begin(SrcReg); - if (llvm::next(DI) != MRI->def_end()) - // Only support one definition. + TargetRegisterInfo::isPhysicalRegister(SrcReg)) return false; // Attempt to convert the defining instruction to set the "zero" flag. - if (TII->ConvertToSetZeroFlag(&*DI, MI, NextIter)) { + if (TII->ConvertToSetZeroFlag(MI, NextIter)) { ++NumEliminated; return true; } -- cgit v1.2.3