From c3e80cc8859c7c35625146d75cc41a0b36c83965 Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Wed, 28 Mar 2012 23:54:28 +0000 Subject: Enable machine code verification in the entire code generator. Some targets still mess up the liveness information, but that isn't verified after MRI->invalidateLiveness(). The verifier can still check other useful things like register classes and CFG, so it should be enabled after all passes. llvm-svn: 153615 --- llvm/lib/CodeGen/Passes.cpp | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) (limited to 'llvm/lib/CodeGen/Passes.cpp') diff --git a/llvm/lib/CodeGen/Passes.cpp b/llvm/lib/CodeGen/Passes.cpp index 4a25af02f05..53d1fcf7377 100644 --- a/llvm/lib/CodeGen/Passes.cpp +++ b/llvm/lib/CodeGen/Passes.cpp @@ -272,11 +272,6 @@ AnalysisID TargetPassConfig::addPass(char &ID) { return FinalID; } -void TargetPassConfig::printNoVerify(const char *Banner) const { - if (TM->shouldPrintMachineCode()) - PM.add(createMachineFunctionPrinterPass(dbgs(), Banner)); -} - void TargetPassConfig::printAndVerify(const char *Banner) const { if (TM->shouldPrintMachineCode()) PM.add(createMachineFunctionPrinterPass(dbgs(), Banner)); @@ -403,7 +398,7 @@ void TargetPassConfig::addMachinePasses() { // Second pass scheduler. if (getOptLevel() != CodeGenOpt::None) { addPass(PostRASchedulerID); - printNoVerify("After PostRAScheduler"); + printAndVerify("After PostRAScheduler"); } // GC @@ -416,7 +411,7 @@ void TargetPassConfig::addMachinePasses() { addBlockPlacement(); if (addPreEmitPass()) - printNoVerify("After PreEmit passes"); + printAndVerify("After PreEmit passes"); } /// Add passes that optimize machine instructions in SSA form. @@ -628,6 +623,6 @@ void TargetPassConfig::addBlockPlacement() { if (EnableBlockPlacementStats) addPass(MachineBlockPlacementStatsID); - printNoVerify("After machine block placement."); + printAndVerify("After machine block placement."); } } -- cgit v1.2.3