From 17080b9bf28a33ab222068f89f3f846398048b31 Mon Sep 17 00:00:00 2001 From: Andrew Trick Date: Sat, 28 Dec 2013 21:56:51 +0000 Subject: Stub out a PostMachineScheduler pass. Placeholder and boilerplate for a PostRA MachineScheduler pass. llvm-svn: 198120 --- llvm/lib/CodeGen/Passes.cpp | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) (limited to 'llvm/lib/CodeGen/Passes.cpp') diff --git a/llvm/lib/CodeGen/Passes.cpp b/llvm/lib/CodeGen/Passes.cpp index f31a843a94c..fed5a4aaca5 100644 --- a/llvm/lib/CodeGen/Passes.cpp +++ b/llvm/lib/CodeGen/Passes.cpp @@ -88,6 +88,14 @@ PrintMachineInstrs("print-machineinstrs", cl::ValueOptional, cl::desc("Print machine instrs"), cl::value_desc("pass-name"), cl::init("option-unspecified")); +// Temporary option to allow experimenting with MachineScheduler as a post-RA +// scheduler. Targets can "properly" enable this with +// substitutePass(&PostRASchedulerID, &MachineSchedulerID); Ideally it wouldn't +// be part of the standard pass pipeline, and the target would just add a PostRA +// scheduling pass wherever it wants. +static cl::opt MISchedPostRA("misched-postra", cl::Hidden, + cl::desc("Run MachineScheduler post regalloc (independent of preRA sched)")); + // Experimental option to run live interval analysis early. static cl::opt EarlyLiveIntervals("early-live-intervals", cl::Hidden, cl::desc("Run live interval analysis earlier in the pipeline")); @@ -525,7 +533,10 @@ void TargetPassConfig::addMachinePasses() { // Second pass scheduler. if (getOptLevel() != CodeGenOpt::None) { - addPass(&PostRASchedulerID); + if (MISchedPostRA) + addPass(&PostMachineSchedulerID); + else + addPass(&PostRASchedulerID); printAndVerify("After PostRAScheduler"); } -- cgit v1.2.3