From 03da6e8c00de2320e6b9dacba8f7850faceae319 Mon Sep 17 00:00:00 2001 From: Thomas Raoux Date: Wed, 6 Nov 2019 11:57:05 -0800 Subject: [ModuloSchedule] Do target loop analysis before peeling. Simple change to call target hook analyzeLoopForPipelining before changing the loop. After peeling analyzing the loop may be more complicated for target that don't have a loop instruction. This doesn't affect Hexagone and PPC as they have hardware loop instructions. Differential Revision: https://reviews.llvm.org/D69912 --- llvm/lib/CodeGen/ModuloSchedule.cpp | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'llvm/lib/CodeGen/ModuloSchedule.cpp') diff --git a/llvm/lib/CodeGen/ModuloSchedule.cpp b/llvm/lib/CodeGen/ModuloSchedule.cpp index 7ce3c586180..98de0816f27 100644 --- a/llvm/lib/CodeGen/ModuloSchedule.cpp +++ b/llvm/lib/CodeGen/ModuloSchedule.cpp @@ -1759,10 +1759,6 @@ void PeelingModuloScheduleExpander::rewriteUsesOf(MachineInstr *MI) { } void PeelingModuloScheduleExpander::fixupBranches() { - std::unique_ptr Info = - TII->analyzeLoopForPipelining(BB); - assert(Info); - // Work outwards from the kernel. bool KernelDisposed = false; int TC = Schedule.getNumStages() - 1; @@ -1818,6 +1814,8 @@ void PeelingModuloScheduleExpander::expand() { BB = Schedule.getLoop()->getTopBlock(); Preheader = Schedule.getLoop()->getLoopPreheader(); LLVM_DEBUG(Schedule.dump()); + Info = TII->analyzeLoopForPipelining(BB); + assert(Info); rewriteKernel(); peelPrologAndEpilogs(); -- cgit v1.2.3