From bc623edabad965bc7c8386a85020bed6f25fd4ea Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Mon, 20 Oct 2008 20:03:28 +0000 Subject: Add a register class -> virtual registers map. llvm-svn: 57844 --- llvm/lib/CodeGen/MachineRegisterInfo.cpp | 1 + 1 file changed, 1 insertion(+) (limited to 'llvm/lib/CodeGen/MachineRegisterInfo.cpp') diff --git a/llvm/lib/CodeGen/MachineRegisterInfo.cpp b/llvm/lib/CodeGen/MachineRegisterInfo.cpp index c247a22d23e..5e20689e0f6 100644 --- a/llvm/lib/CodeGen/MachineRegisterInfo.cpp +++ b/llvm/lib/CodeGen/MachineRegisterInfo.cpp @@ -16,6 +16,7 @@ using namespace llvm; MachineRegisterInfo::MachineRegisterInfo(const TargetRegisterInfo &TRI) { VRegInfo.reserve(256); + RegClass2VRegMap.resize(TRI.getNumRegClasses()+1); // RC ID starts at 1. UsedPhysRegs.resize(TRI.getNumRegs()); // Create the physreg use/def lists. -- cgit v1.2.3