From ff7070bbb94af5009f3aa82e4ab65b7671a2dc73 Mon Sep 17 00:00:00 2001
From: "Vikram S. Adve" <vadve@cs.uiuc.edu>
Date: Tue, 31 Jul 2001 21:49:28 +0000
Subject: Allow machine instructions with variable numbers of arguments. This
 is used only by Phi for now.

llvm-svn: 336
---
 llvm/lib/CodeGen/MachineInstr.cpp | 13 ++++++++++++-
 1 file changed, 12 insertions(+), 1 deletion(-)

(limited to 'llvm/lib/CodeGen/MachineInstr.cpp')

diff --git a/llvm/lib/CodeGen/MachineInstr.cpp b/llvm/lib/CodeGen/MachineInstr.cpp
index 64fcaa05771..d3e468cc2eb 100644
--- a/llvm/lib/CodeGen/MachineInstr.cpp
+++ b/llvm/lib/CodeGen/MachineInstr.cpp
@@ -19,12 +19,23 @@
 
 //************************ Class Implementations **************************/
 
-
+// Constructor for instructions with fixed #operands (nearly all)
 MachineInstr::MachineInstr(MachineOpCode _opCode,
 			   OpCodeMask    _opCodeMask)
   : opCode(_opCode),
     opCodeMask(_opCodeMask),
     operands(TargetInstrDescriptors[_opCode].numOperands)
+{
+  assert(TargetInstrDescriptors[_opCode].numOperands >= 0);
+}
+
+// Constructor for instructions with variable #operands
+MachineInstr::MachineInstr(MachineOpCode _opCode,
+			   unsigned	 numOperands,
+			   OpCodeMask    _opCodeMask)
+  : opCode(_opCode),
+    opCodeMask(_opCodeMask),
+    operands(numOperands)
 {
 }
 
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