From 539df43e4b2cf82a02f2c4f8e34c1c081603c979 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Mon, 20 Nov 2006 17:57:22 +0000 Subject: setOperand should not zap the operand list or add implicit operands to an instruction. Doing so breaks the FP stackifier, the alpha branch selector the sparc fpmover. This fixes PR1012 and CodeGen/X86/fp-stack-compare.ll llvm-svn: 31876 --- llvm/lib/CodeGen/MachineInstr.cpp | 39 --------------------------------------- 1 file changed, 39 deletions(-) (limited to 'llvm/lib/CodeGen/MachineInstr.cpp') diff --git a/llvm/lib/CodeGen/MachineInstr.cpp b/llvm/lib/CodeGen/MachineInstr.cpp index 41e2cdfe83b..16e235a679b 100644 --- a/llvm/lib/CodeGen/MachineInstr.cpp +++ b/llvm/lib/CodeGen/MachineInstr.cpp @@ -180,45 +180,6 @@ bool MachineOperand::isIdenticalTo(const MachineOperand &Other) const { } } -/// setOpcode - Replace the opcode of the current instruction with a new one. -/// -void MachineInstr::setOpcode(unsigned Op) { - Operands.erase(Operands.begin(), Operands.begin()+NumImplicitOps); - NumImplicitOps = 0; - Opcode = Op; - if (!getParent()) - return; - const TargetInstrDescriptor &TID = getParent()->getParent()-> - getTarget().getInstrInfo()->get(Op); - if (TID.ImplicitDefs) - for (const unsigned *ImpDefs = TID.ImplicitDefs; *ImpDefs; ++ImpDefs) { - MachineOperand Op; - Op.opType = MachineOperand::MO_Register; - Op.IsDef = true; - Op.IsImp = true; - Op.IsKill = false; - Op.IsDead = false; - Op.contents.RegNo = *ImpDefs; - Op.offset = 0; - Operands.insert(Operands.begin()+NumImplicitOps, Op); - NumImplicitOps++; - } - if (TID.ImplicitUses) - for (const unsigned *ImpUses = TID.ImplicitUses; *ImpUses; ++ImpUses) { - MachineOperand Op; - Op.opType = MachineOperand::MO_Register; - Op.IsDef = false; - Op.IsImp = true; - Op.IsKill = false; - Op.IsDead = false; - Op.contents.RegNo = *ImpUses; - Op.offset = 0; - Operands.insert(Operands.begin()+NumImplicitOps, Op); - NumImplicitOps++; - } -} - - void MachineInstr::dump() const { std::cerr << " " << *this; } -- cgit v1.2.3