From bdaf8bfa99830bad36c9833ca6a661294fb27577 Mon Sep 17 00:00:00 2001 From: Francis Visoiu Mistrih Date: Thu, 14 Dec 2017 10:03:14 +0000 Subject: [CodeGen] Print live-out register lists as liveout(...) in both MIR and debug output Work towards the unification of MIR and debug output by printing `liveout(...)` instead of ``. Only debug syntax is affected. llvm-svn: 320683 --- llvm/lib/CodeGen/MIRPrinter.cpp | 18 ++---------------- 1 file changed, 2 insertions(+), 16 deletions(-) (limited to 'llvm/lib/CodeGen/MIRPrinter.cpp') diff --git a/llvm/lib/CodeGen/MIRPrinter.cpp b/llvm/lib/CodeGen/MIRPrinter.cpp index f625be36a81..fcf59adb7b3 100644 --- a/llvm/lib/CodeGen/MIRPrinter.cpp +++ b/llvm/lib/CodeGen/MIRPrinter.cpp @@ -797,7 +797,8 @@ void MIPrinter::print(const MachineInstr &MI, unsigned OpIdx, case MachineOperand::MO_TargetIndex: case MachineOperand::MO_JumpTableIndex: case MachineOperand::MO_ExternalSymbol: - case MachineOperand::MO_GlobalAddress: { + case MachineOperand::MO_GlobalAddress: + case MachineOperand::MO_RegisterLiveOut: { unsigned TiedOperandIdx = 0; if (ShouldPrintRegisterTies && Op.isReg() && Op.isTied() && !Op.isDef()) TiedOperandIdx = Op.getParent()->findTiedOperandIdx(OpIdx); @@ -829,21 +830,6 @@ void MIPrinter::print(const MachineInstr &MI, unsigned OpIdx, printCustomRegMask(Op.getRegMask(), OS, TRI); break; } - case MachineOperand::MO_RegisterLiveOut: { - const uint32_t *RegMask = Op.getRegLiveOut(); - OS << "liveout("; - bool IsCommaNeeded = false; - for (unsigned Reg = 0, E = TRI->getNumRegs(); Reg < E; ++Reg) { - if (RegMask[Reg / 32] & (1U << (Reg % 32))) { - if (IsCommaNeeded) - OS << ", "; - OS << printReg(Reg, TRI); - IsCommaNeeded = true; - } - } - OS << ")"; - break; - } case MachineOperand::MO_Metadata: Op.getMetadata()->printAsOperand(OS, MST); break; -- cgit v1.2.3