From 7d1b25d0538f52931b0b12d781fe8c1487b01010 Mon Sep 17 00:00:00 2001 From: Michael Berg Date: Thu, 3 May 2018 00:07:56 +0000 Subject: MachineInst support mapping SDNode fast math flags for support in Back End code generation Summary: Machine Instruction flags for fast math support and MIR print support Reviewers: spatel, arsenm Reviewed By: arsenm Subscribers: wdng Differential Revision: https://reviews.llvm.org/D45781 llvm-svn: 331417 --- llvm/lib/CodeGen/MIRPrinter.cpp | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'llvm/lib/CodeGen/MIRPrinter.cpp') diff --git a/llvm/lib/CodeGen/MIRPrinter.cpp b/llvm/lib/CodeGen/MIRPrinter.cpp index 797affa9431..bf8cd1489ec 100644 --- a/llvm/lib/CodeGen/MIRPrinter.cpp +++ b/llvm/lib/CodeGen/MIRPrinter.cpp @@ -680,6 +680,20 @@ void MIPrinter::print(const MachineInstr &MI) { OS << "frame-setup "; if (MI.getFlag(MachineInstr::FrameDestroy)) OS << "frame-destroy "; + if (MI.getFlag(MachineInstr::FmNoNans)) + OS << "nnan "; + if (MI.getFlag(MachineInstr::FmNoInfs)) + OS << "ninf "; + if (MI.getFlag(MachineInstr::FmNsz)) + OS << "nsz "; + if (MI.getFlag(MachineInstr::FmArcp)) + OS << "arcp "; + if (MI.getFlag(MachineInstr::FmContract)) + OS << "contract "; + if (MI.getFlag(MachineInstr::FmAfn)) + OS << "afn "; + if (MI.getFlag(MachineInstr::FmReassoc)) + OS << "reassoc "; OS << TII->getName(MI.getOpcode()); if (I < E) -- cgit v1.2.3