From 53464510ccbc20763287af49bae38c606b148619 Mon Sep 17 00:00:00 2001 From: Alex Lorenz Date: Fri, 10 Jul 2015 22:51:20 +0000 Subject: MIR Serialization: Serialize the virtual register operands. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D11005 llvm-svn: 241959 --- llvm/lib/CodeGen/MIRParser/MIParser.cpp | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'llvm/lib/CodeGen/MIRParser/MIParser.cpp') diff --git a/llvm/lib/CodeGen/MIRParser/MIParser.cpp b/llvm/lib/CodeGen/MIRParser/MIParser.cpp index 7fd794bd211..5a88a8d21a5 100644 --- a/llvm/lib/CodeGen/MIRParser/MIParser.cpp +++ b/llvm/lib/CodeGen/MIRParser/MIParser.cpp @@ -288,6 +288,17 @@ bool MIParser::parseRegister(unsigned &Reg) { return error(Twine("unknown register name '") + Name + "'"); break; } + case MIToken::VirtualRegister: { + unsigned ID; + if (getUnsigned(ID)) + return true; + const auto RegInfo = PFS.VirtualRegisterSlots.find(ID); + if (RegInfo == PFS.VirtualRegisterSlots.end()) + return error(Twine("use of undefined virtual register '%") + Twine(ID) + + "'"); + Reg = RegInfo->second; + break; + } // TODO: Parse other register kinds. default: llvm_unreachable("The current token should be a register"); @@ -425,6 +436,7 @@ bool MIParser::parseMachineOperand(MachineOperand &Dest) { case MIToken::kw_undef: case MIToken::underscore: case MIToken::NamedRegister: + case MIToken::VirtualRegister: return parseRegisterOperand(Dest); case MIToken::IntegerLiteral: return parseImmediateOperand(Dest); -- cgit v1.2.3