From ea9f8ce03cfc6fd5cdc1fb242843378561ad3ed7 Mon Sep 17 00:00:00 2001 From: Krzysztof Parzyszek Date: Fri, 16 Dec 2016 19:11:56 +0000 Subject: Implement LaneBitmask::any(), use it to replace !none(), NFCI llvm-svn: 289974 --- llvm/lib/CodeGen/LiveInterval.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'llvm/lib/CodeGen/LiveInterval.cpp') diff --git a/llvm/lib/CodeGen/LiveInterval.cpp b/llvm/lib/CodeGen/LiveInterval.cpp index 8471260eac9..623af492fcd 100644 --- a/llvm/lib/CodeGen/LiveInterval.cpp +++ b/llvm/lib/CodeGen/LiveInterval.cpp @@ -876,7 +876,7 @@ void LiveInterval::computeSubRangeUndefs(SmallVectorImpl &Undefs, const SlotIndexes &Indexes) const { assert(TargetRegisterInfo::isVirtualRegister(reg)); LaneBitmask VRegMask = MRI.getMaxLaneMaskForVReg(reg); - assert(!(VRegMask & LaneMask).none()); + assert((VRegMask & LaneMask).any()); const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo(); for (const MachineOperand &MO : MRI.def_operands(reg)) { if (!MO.isUndef()) @@ -885,7 +885,7 @@ void LiveInterval::computeSubRangeUndefs(SmallVectorImpl &Undefs, assert(SubReg != 0 && "Undef should only be set on subreg defs"); LaneBitmask DefMask = TRI.getSubRegIndexLaneMask(SubReg); LaneBitmask UndefMask = VRegMask & ~DefMask; - if (!(UndefMask & LaneMask).none()) { + if ((UndefMask & LaneMask).any()) { const MachineInstr &MI = *MO.getParent(); bool EarlyClobber = MO.isEarlyClobber(); SlotIndex Pos = Indexes.getInstructionIndex(MI).getRegSlot(EarlyClobber); -- cgit v1.2.3