From 01a4b83154760ea286117ac4de9576b8a215cb8d Mon Sep 17 00:00:00 2001 From: Michael Liao Date: Wed, 8 Jan 2020 10:50:23 -0500 Subject: [codegen,amdgpu] Enhance MIR DIE and re-arrange it for AMDGPU. Summary: - `dead-mi-elimination` assumes MIR in the SSA form and cannot be arranged after phi elimination or DeSSA. It's enhanced to handle the dead register definition by skipping use check on it. Once a register def is `dead`, all its uses, if any, should be `undef`. - Re-arrange the DIE in RA phase for AMDGPU by placing it directly after `detect-dead-lanes`. - Many relevant tests are refined due to different register assignment. Reviewers: rampitec, qcolombet, sunfish Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D72709 --- llvm/lib/CodeGen/DeadMachineInstructionElim.cpp | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'llvm/lib/CodeGen/DeadMachineInstructionElim.cpp') diff --git a/llvm/lib/CodeGen/DeadMachineInstructionElim.cpp b/llvm/lib/CodeGen/DeadMachineInstructionElim.cpp index 618ac3122a4..d1529b08f70 100644 --- a/llvm/lib/CodeGen/DeadMachineInstructionElim.cpp +++ b/llvm/lib/CodeGen/DeadMachineInstructionElim.cpp @@ -82,6 +82,15 @@ bool DeadMachineInstructionElim::isDead(const MachineInstr *MI) const { if (LivePhysRegs.test(Reg) || MRI->isReserved(Reg)) return false; } else { + if (MO.isDead()) { +#ifndef NDEBUG + // Sanity check on uses of this dead register. All of them should be + // 'undef'. + for (auto &U : MRI->use_nodbg_operands(Reg)) + assert(U.isUndef() && "'Undef' use on a 'dead' register is found!"); +#endif + continue; + } for (const MachineInstr &Use : MRI->use_nodbg_instructions(Reg)) { if (&Use != MI) // This def has a non-debug use. Don't delete the instruction! -- cgit v1.2.3