From 1ce38545fb142740944e5f268ec6c4b543f706f5 Mon Sep 17 00:00:00 2001
From: Quentin Colombet <qcolombet@apple.com>
Date: Tue, 16 Feb 2016 00:57:44 +0000
Subject: [GlobalISel] Get rid of the ifdefs in TargetLowering. Introduce a new
 API used only by GlobalISel: CallLowering. This API will contain target hooks
 dedicated to call lowering.

llvm-svn: 260922
---
 .../include/llvm/CodeGen/GlobalISel/IRTranslator.h |  4 +--
 llvm/include/llvm/Target/TargetLowering.h          | 32 ----------------------
 llvm/include/llvm/Target/TargetSubtargetInfo.h     |  3 ++
 3 files changed, 5 insertions(+), 34 deletions(-)

(limited to 'llvm/include')

diff --git a/llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h b/llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h
index d7414123da2..d2ca3125c93 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h
@@ -28,13 +28,13 @@
 namespace llvm {
 // Forward declarations.
 class BasicBlock;
+class CallLowering;
 class Constant;
 class Instruction;
 class MachineBasicBlock;
 class MachineFunction;
 class MachineInstr;
 class MachineRegisterInfo;
-class TargetLowering;
 
 // Technically the pass should run on an hypothetical MachineModule,
 // since it should translate Global into some sort of MachineGlobal.
@@ -50,7 +50,7 @@ public:
 
 private:
   /// Interface used to lower the everything related to calls.
-  const TargetLowering *TLI;
+  const CallLowering *CLI;
   /// Mapping of the values of the current LLVM IR function
   /// to the related virtual registers.
   ValueToVReg ValToVReg;
diff --git a/llvm/include/llvm/Target/TargetLowering.h b/llvm/include/llvm/Target/TargetLowering.h
index 4f38f64bb60..eb640529e0f 100644
--- a/llvm/include/llvm/Target/TargetLowering.h
+++ b/llvm/include/llvm/Target/TargetLowering.h
@@ -25,17 +25,11 @@
 
 #include "llvm/ADT/DenseMap.h"
 #include "llvm/CodeGen/DAGCombine.h"
-#ifdef LLVM_BUILD_GLOBAL_ISEL
-#include "llvm/CodeGen/GlobalISel/Types.h"
-#endif
 #include "llvm/CodeGen/RuntimeLibcalls.h"
 #include "llvm/CodeGen/SelectionDAGNodes.h"
 #include "llvm/IR/Attributes.h"
 #include "llvm/IR/CallSite.h"
 #include "llvm/IR/CallingConv.h"
-#ifdef LLVM_BUILD_GLOBAL_ISEL
-#  include "llvm/IR/Function.h"
-#endif
 #include "llvm/IR/IRBuilder.h"
 #include "llvm/IR/InlineAsm.h"
 #include "llvm/IR/Instructions.h"
@@ -56,9 +50,6 @@ namespace llvm {
   class MachineBasicBlock;
   class MachineFunction;
   class MachineInstr;
-#ifdef LLVM_BUILD_GLOBAL_ISEL
-  class MachineIRBuilder;
-#endif
   class MachineJumpTableInfo;
   class MachineLoop;
   class Mangler;
@@ -2515,29 +2506,6 @@ public:
     llvm_unreachable("Not Implemented");
   }
 
-#ifdef LLVM_BUILD_GLOBAL_ISEL
-  virtual bool LowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val,
-                           unsigned VReg) const {
-    return false;
-  }
-
-  /// This hook must be implemented to lower the incoming (formal)
-  /// arguments, described by \p Args, for GlobalISel. Each argument
-  /// must end up in the related virtual register described by VRegs.
-  /// In other words, the first argument should end up in VRegs[0],
-  /// the second in VRegs[1], and so on.
-  /// \p MIRBuilder is set to the proper insertion for the argument
-  /// lowering.
-  ///
-  /// \return True if the lowering succeeded, false otherwise.
-  virtual bool
-  LowerFormalArguments(MachineIRBuilder &MIRBuilder,
-                       const Function::ArgumentListType &Args,
-                       const SmallVectorImpl<unsigned> &VRegs) const {
-    return false;
-  }
-#endif
-
   /// Return true if result of the specified node is used by a return node
   /// only. It also compute and return the input chain for the tail call.
   ///
diff --git a/llvm/include/llvm/Target/TargetSubtargetInfo.h b/llvm/include/llvm/Target/TargetSubtargetInfo.h
index e988d02eb7d..c2e36be74ae 100644
--- a/llvm/include/llvm/Target/TargetSubtargetInfo.h
+++ b/llvm/include/llvm/Target/TargetSubtargetInfo.h
@@ -21,6 +21,7 @@
 
 namespace llvm {
 
+class CallLowering;
 class DataLayout;
 class MachineFunction;
 class MachineInstr;
@@ -71,6 +72,7 @@ public:
   // -- Pipelines and scheduling information
   // -- Stack frame information
   // -- Selection DAG lowering information
+  // -- Call lowering information
   //
   // N.B. These objects may change during compilation. It's not safe to cache
   // them between functions.
@@ -82,6 +84,7 @@ public:
   virtual const SelectionDAGTargetInfo *getSelectionDAGInfo() const {
     return nullptr;
   }
+  virtual const CallLowering *getCallLowering() const { return nullptr; }
   /// Target can subclass this hook to select a different DAG scheduler.
   virtual RegisterScheduler::FunctionPassCtor
       getDAGScheduler(CodeGenOpt::Level) const {
-- 
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