From ab7a75188960e51ca411b70cdcfb0c8636d99c13 Mon Sep 17 00:00:00 2001
From: Sandeep Patel <deeppatel1987@gmail.com>
Date: Thu, 20 Aug 2009 15:01:16 +0000
Subject: Correct ARM v7-A architecture name spelling and add note about hard
 float.

llvm-svn: 79530
---
 llvm/docs/ReleaseNotes-2.6.html | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

(limited to 'llvm/docs')

diff --git a/llvm/docs/ReleaseNotes-2.6.html b/llvm/docs/ReleaseNotes-2.6.html
index 1dbecf6a054..f91b15ec543 100644
--- a/llvm/docs/ReleaseNotes-2.6.html
+++ b/llvm/docs/ReleaseNotes-2.6.html
@@ -407,10 +407,12 @@ it run faster:</p>
 <ul>
 
 <li>Preliminary support for processors, such as the Cortex-A8 and Cortex-A9,
-that implement version 7 of the ARM architecture.  The ARM backend now
-supports both the Thumb2 and Advanced SIMD (Neon) instruction sets.
-These features are still somewhat experimental and subject to change.
-The Neon intrinsics, in particular, may change in future releases of LLVM.
+that implement version v7-A of the ARM architecture.  The ARM backend now
+supports both the Thumb2 and Advanced SIMD (Neon) instruction sets. The
+AAPCS-VFP "hard float" calling conventions are also supported with the
+<tt>-float-abi=hard</tt> flag. These features are still somewhat experimental
+and subject to change. The Neon intrinsics, in particular, may change in future
+releases of LLVM.
 </li>
 </ul>
 
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