From 850fc977c807984bcc583e1dede4b9113f1657c3 Mon Sep 17 00:00:00 2001 From: Ayman Musa Date: Tue, 7 Mar 2017 08:11:19 +0000 Subject: [X86][AVX512] Adding new LLVM TableGen backend which generates the EVEX2VEX compressing tables. X86EvexToVex machine instruction pass compresses EVEX encoded instructions by replacing them with their identical VEX encoded instructions when possible. It uses manually supported 2 large tables that map the EVEX instructions to their VEX ideticals. This TableGen backend replaces the tables by automatically generating them. Differential Revision: https://reviews.llvm.org/D30451 llvm-svn: 297127 --- llvm/docs/TableGen/BackEnds.rst | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'llvm/docs') diff --git a/llvm/docs/TableGen/BackEnds.rst b/llvm/docs/TableGen/BackEnds.rst index fdab266fa31..993134386f7 100644 --- a/llvm/docs/TableGen/BackEnds.rst +++ b/llvm/docs/TableGen/BackEnds.rst @@ -228,6 +228,12 @@ CTags format. A helper script, utils/TableGen/tdtags, provides an easier-to-use interface; run 'tdtags -H' for documentation. +X86EVEX2VEX +----------- + +**Purpose**: This X86 specific tablegen backend emits tables that map EVEX +encoded instructions to their VEX encoded identical instruction. + Clang BackEnds ============== -- cgit v1.2.3