From 47eb63684d22c12b9defb99c394dbd10e26fefff Mon Sep 17 00:00:00 2001 From: Dmitry Preobrazhensky Date: Mon, 17 Dec 2018 17:38:11 +0000 Subject: [AMDGPU][MC][DOC] Updated AMD GPU assembler description Stage 2: added detailed description of operands See bug 36572: https://bugs.llvm.org/show_bug.cgi?id=36572 llvm-svn: 349368 --- llvm/docs/AMDGPU/gfx8_param.rst | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) create mode 100644 llvm/docs/AMDGPU/gfx8_param.rst (limited to 'llvm/docs/AMDGPU/gfx8_param.rst') diff --git a/llvm/docs/AMDGPU/gfx8_param.rst b/llvm/docs/AMDGPU/gfx8_param.rst new file mode 100644 index 00000000000..0bd88549f09 --- /dev/null +++ b/llvm/docs/AMDGPU/gfx8_param.rst @@ -0,0 +1,22 @@ +.. + ************************************************** + * * + * Automatically generated file, do not edit! * + * * + ************************************************** + +.. _amdgpu_synid8_param: + +param +=========================== + +Interpolation parameter to read: + + ============ =================================== + Syntax Description + ============ =================================== + p0 Parameter *P0*. + p10 Parameter *P10*. + p20 Parameter *P20*. + ============ =================================== + -- cgit v1.2.3