From e6a661053d8a9dc4b637442aa93662bf4580bc2f Mon Sep 17 00:00:00 2001 From: Pavel Labath Date: Fri, 3 Nov 2017 15:22:36 +0000 Subject: Add float/vector registers for ppc64le Summary: Add read and write functions for VSX, VMX and float registers and fix watchpoint size Reviewers: clayborg Reviewed By: clayborg Subscribers: eugene, labath, clayborg, nemanjai, kbarton, JDevlieghere, anajuliapc, gut, lbianc, lldb-commits Differential Revision: https://reviews.llvm.org/D39487 Patch by: Alexandre Yukio Yamashita llvm-svn: 317329 --- lldb/packages/Python/lldbsuite/test/make/Makefile.rules | 3 +++ 1 file changed, 3 insertions(+) (limited to 'lldb/packages/Python/lldbsuite') diff --git a/lldb/packages/Python/lldbsuite/test/make/Makefile.rules b/lldb/packages/Python/lldbsuite/test/make/Makefile.rules index 4489c6cc530..df91da71f28 100644 --- a/lldb/packages/Python/lldbsuite/test/make/Makefile.rules +++ b/lldb/packages/Python/lldbsuite/test/make/Makefile.rules @@ -181,6 +181,9 @@ else ifeq "$(ARCH)" "powerpc64" override ARCH := $(subst powerpc64,64,$(ARCH)) endif + ifeq "$(ARCH)" "powerpc64le" + override ARCH := $(subst powerpc64le,64,$(ARCH)) + endif ifeq "$(ARCH)" "aarch64" override ARCH := override ARCHFLAG := -- cgit v1.2.3