From 9568a5102edacda134d665fc209f2ae9c5db1f08 Mon Sep 17 00:00:00 2001 From: Chris Bieneman Date: Mon, 25 Sep 2017 17:31:40 +0000 Subject: Revert "Initial patchset to get the testsuite running against armv7 and arm64 iOS devices. Normal customer devices won't be able to run these devices, we're hoping to get a public facing bot set up at some point. Both devices pass the testsuite without any errors or failures." This patch has been causing LLDB test failures on ObjC tests. A test log may still be available here: http://lab.llvm.org:8080/green/view/LLDB/job/lldb/1650/ This reverts commit r314038. llvm-svn: 314122 --- .../register/register_command/TestRegisters.py | 35 ++-------------------- 1 file changed, 2 insertions(+), 33 deletions(-) (limited to 'lldb/packages/Python/lldbsuite/test/functionalities/register/register_command') diff --git a/lldb/packages/Python/lldbsuite/test/functionalities/register/register_command/TestRegisters.py b/lldb/packages/Python/lldbsuite/test/functionalities/register/register_command/TestRegisters.py index 8c33687f688..fe6ce2c25a3 100644 --- a/lldb/packages/Python/lldbsuite/test/functionalities/register/register_command/TestRegisters.py +++ b/lldb/packages/Python/lldbsuite/test/functionalities/register/register_command/TestRegisters.py @@ -45,7 +45,7 @@ class RegisterCommandsTestCase(TestBase): self.runCmd("register read xmm0") self.runCmd("register read ymm15") # may be available self.runCmd("register read bnd0") # may be available - elif self.getArchitecture() in ['arm', 'armv7', 'arm64']: + elif self.getArchitecture() in ['arm']: self.runCmd("register read s0") self.runCmd("register read q15") # may be available @@ -84,10 +84,7 @@ class RegisterCommandsTestCase(TestBase): if self.getArchitecture() in ['amd64', 'i386', 'x86_64']: gpr = "eax" vector = "xmm0" - elif self.getArchitecture() in ['arm64', 'aarch64']: - gpr = "w0" - vector = "v0" - elif self.getArchitecture() in ['arm', 'armv7']: + elif self.getArchitecture() in ['arm']: gpr = "r0" vector = "q0" @@ -320,34 +317,6 @@ class RegisterCommandsTestCase(TestBase): ("xmm15", "{0x01 0x02 0x03 0x00 0x00 0x00 0x00 0x00 0x09 0x0a 0x2f 0x2f 0x2f 0x2f 0x0e 0x0f}", False)) - elif self.getArchitecture() in ['arm64', 'aarch64']: - reg_list = [ - # reg value - # must-have - ("fpsr", "0xfbf79f9f", True), - ("s0", "1.25", True), - ("s31", "0.75", True), - ("d1", "123", True), - ("d17", "987", False), - ("v1", "{0x01 0x02 0x03 0x00 0x00 0x00 0x00 0x00 0x09 0x0a 0x2f 0x2f 0x2f 0x2f 0x2f 0x2f}", True), - ("v14", - "{0x01 0x02 0x03 0x00 0x00 0x00 0x00 0x00 0x09 0x0a 0x2f 0x2f 0x2f 0x2f 0x0e 0x0f}", - False), - ] - elif self.getArchitecture() in ['armv7', 'armv7k'] and self.platformIsDarwin(): - reg_list = [ - # reg value - # must-have - ("fpsr", "0xfbf79f9f", True), - ("s0", "1.25", True), - ("s31", "0.75", True), - ("d1", "123", True), - ("d17", "987", False), - ("q1", "{0x01 0x02 0x03 0x00 0x00 0x00 0x00 0x00 0x09 0x0a 0x2f 0x2f 0x2f 0x2f 0x2f 0x2f}", True), - ("q14", - "{0x01 0x02 0x03 0x00 0x00 0x00 0x00 0x00 0x09 0x0a 0x2f 0x2f 0x2f 0x2f 0x0e 0x0f}", - False), - ] elif self.getArchitecture() in ['arm']: reg_list = [ # reg value -- cgit v1.2.3