From a6b264b51d4fa786d9df659621fc1ffad1fdc5d0 Mon Sep 17 00:00:00 2001 From: Alexey Samsonov Date: Fri, 14 Feb 2014 09:20:33 +0000 Subject: Move original compiler-rt functions (libgcc replacement) to lib/builtins directory llvm-svn: 201393 --- compiler-rt/lib/builtins/arm/fixunssfsivfp.S | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) create mode 100644 compiler-rt/lib/builtins/arm/fixunssfsivfp.S (limited to 'compiler-rt/lib/builtins/arm/fixunssfsivfp.S') diff --git a/compiler-rt/lib/builtins/arm/fixunssfsivfp.S b/compiler-rt/lib/builtins/arm/fixunssfsivfp.S new file mode 100644 index 00000000000..f12dff61af5 --- /dev/null +++ b/compiler-rt/lib/builtins/arm/fixunssfsivfp.S @@ -0,0 +1,27 @@ +//===-- fixunssfsivfp.S - Implement fixunssfsivfp -------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "../assembly.h" + +// +// extern unsigned int __fixunssfsivfp(float a); +// +// Converts single precision float to a 32-bit unsigned int rounding towards +// zero. All negative values become zero. +// Uses Darwin calling convention where a single precision parameter is +// passed in a GPR.. +// + .syntax unified + .align 2 +DEFINE_COMPILERRT_FUNCTION(__fixunssfsivfp) + vmov s15, r0 // load float register from R0 + vcvt.u32.f32 s15, s15 // convert single to 32-bit unsigned into s15 + vmov r0, s15 // move s15 to result register + bx lr +END_COMPILERRT_FUNCTION(__fixunssfsivfp) -- cgit v1.2.3