From 7723f97d6ad076112cc78d9bd2d43050e7dda8a5 Mon Sep 17 00:00:00 2001 From: Tony Jiang Date: Thu, 10 Nov 2016 14:39:56 +0000 Subject: [PowerPC] Implement plain VSX load/store builtins. Implement all the different 24 overloads for vec_xl and vec_xst. llvm-svn: 286455 --- clang/test/CodeGen/builtins-ppc-altivec.c | 67 +++++++++++++++++++++++++++++++ 1 file changed, 67 insertions(+) (limited to 'clang/test/CodeGen/builtins-ppc-altivec.c') diff --git a/clang/test/CodeGen/builtins-ppc-altivec.c b/clang/test/CodeGen/builtins-ppc-altivec.c index 56b4f7d5691..f8a4a3be664 100644 --- a/clang/test/CodeGen/builtins-ppc-altivec.c +++ b/clang/test/CodeGen/builtins-ppc-altivec.c @@ -45,6 +45,7 @@ unsigned short param_us; int param_i; unsigned int param_ui; float param_f; +signed long long param_sll; int res_sc; int res_uc; @@ -9224,3 +9225,69 @@ void test8() { // CHECK-LE: xor <16 x i8> // CHECK-LE: call <4 x i32> @llvm.ppc.altivec.vperm(<4 x i32> {{%.+}}, <4 x i32> {{%.+}}, <16 x i8> {{%.+}}) } + +/* ------------------------------ vec_xl ------------------------------------ */ +void test9() { + // CHECK-LABEL: define void @test9 + // CHECK-LE-LABEL: define void @test9 + res_vsc = vec_xl(param_sll, ¶m_sc); + // CHECK: load <16 x i8>, <16 x i8>* %{{[0-9]+}}, align 16 + // CHECK-LE: load <16 x i8>, <16 x i8>* %{{[0-9]+}}, align 16 + + res_vuc = vec_xl(param_sll, ¶m_uc); + // CHECK: load <16 x i8>, <16 x i8>* %{{[0-9]+}}, align 16 + // CHECK-LE: load <16 x i8>, <16 x i8>* %{{[0-9]+}}, align 16 + + res_vs = vec_xl(param_sll, ¶m_s); + // CHECK: load <8 x i16>, <8 x i16>* %{{[0-9]+}}, align 16 + // CHECK-LE: load <8 x i16>, <8 x i16>* %{{[0-9]+}}, align 16 + + res_vus = vec_xl(param_sll, ¶m_us); + // CHECK: load <8 x i16>, <8 x i16>* %{{[0-9]+}}, align 16 + // CHECK-LE: load <8 x i16>, <8 x i16>* %{{[0-9]+}}, align 16 + + res_vi = vec_xl(param_sll, ¶m_i); + // CHECK: load <4 x i32>, <4 x i32>* %{{[0-9]+}}, align 16 + // CHECK-LE: load <4 x i32>, <4 x i32>* %{{[0-9]+}}, align 16 + + res_vui = vec_xl(param_sll, ¶m_ui); + // CHECK: load <4 x i32>, <4 x i32>* %{{[0-9]+}}, align 16 + // CHECK-LE: load <4 x i32>, <4 x i32>* %{{[0-9]+}}, align 16 + + res_vf = vec_xl(param_sll, ¶m_f); + // CHECK: load <4 x float>, <4 x float>* %{{[0-9]+}}, align 16 + // CHECK-LE: load <4 x float>, <4 x float>* %{{[0-9]+}}, align 16 +} + +/* ------------------------------ vec_xst ------------------------------------ */ +void test10() { + // CHECK-LABEL: define void @test10 + // CHECK-LE-LABEL: define void @test10 + vec_xst(vsc, param_sll, ¶m_sc); + // CHECK: store <16 x i8> %{{[0-9]+}}, <16 x i8>* %{{[0-9]+}}, align 16 + // CHECK-LE: store <16 x i8> %{{[0-9]+}}, <16 x i8>* %{{[0-9]+}}, align 16 + + vec_xst(vuc, param_sll, ¶m_uc); + // CHECK: store <16 x i8> %{{[0-9]+}}, <16 x i8>* %{{[0-9]+}}, align 16 + // CHECK-LE: store <16 x i8> %{{[0-9]+}}, <16 x i8>* %{{[0-9]+}}, align 16 + + vec_xst(vs, param_sll, ¶m_s); + // CHECK: store <8 x i16> %{{[0-9]+}}, <8 x i16>* %{{[0-9]+}}, align 16 + // CHECK-LE: store <8 x i16> %{{[0-9]+}}, <8 x i16>* %{{[0-9]+}}, align 16 + + vec_xst(vus, param_sll, ¶m_us); + // CHECK: store <8 x i16> %{{[0-9]+}}, <8 x i16>* %{{[0-9]+}}, align 16 + // CHECK-LE: store <8 x i16> %{{[0-9]+}}, <8 x i16>* %{{[0-9]+}}, align 16 + + vec_xst(vi, param_sll, ¶m_i); + // CHECK: store <4 x i32> %{{[0-9]+}}, <4 x i32>* %{{[0-9]+}}, align 16 + // CHECK-LE: store <4 x i32> %{{[0-9]+}}, <4 x i32>* %{{[0-9]+}}, align 16 + + vec_xst(vui, param_sll, ¶m_ui); + // CHECK: store <4 x i32> %{{[0-9]+}}, <4 x i32>* %{{[0-9]+}}, align 16 + // CHECK-LE: store <4 x i32> %{{[0-9]+}}, <4 x i32>* %{{[0-9]+}}, align 16 + + vec_xst(vf, param_sll, ¶m_f); + // CHECK: store <4 x float> %{{[0-9]+}}, <4 x float>* %{{[0-9]+}}, align 16 + // CHECK-LE: store <4 x float> %{{[0-9]+}}, <4 x float>* %{{[0-9]+}}, align 16 +} -- cgit v1.2.3