From 9f02fd9d8d81f79ea93d2ac7eaff59ba10e29f53 Mon Sep 17 00:00:00 2001 From: Stuart Hastings Date: Thu, 28 Apr 2011 21:35:59 +0000 Subject: Raise ARM byval minimum size from 32 to 64, addressing a performance regression in mason. rdar://problem/7662569 llvm-svn: 130444 --- clang/lib/CodeGen/TargetInfo.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'clang/lib/CodeGen/TargetInfo.cpp') diff --git a/clang/lib/CodeGen/TargetInfo.cpp b/clang/lib/CodeGen/TargetInfo.cpp index aa48cb2eebe..bc2472cebbe 100644 --- a/clang/lib/CodeGen/TargetInfo.cpp +++ b/clang/lib/CodeGen/TargetInfo.cpp @@ -2344,7 +2344,7 @@ ABIArgInfo ARMABIInfo::classifyArgumentType(QualType Ty) const { // FIXME: This doesn't handle alignment > 64 bits. const llvm::Type* ElemTy; unsigned SizeRegs; - if (getContext().getTypeSizeInChars(Ty) <= CharUnits::fromQuantity(32)) { + if (getContext().getTypeSizeInChars(Ty) <= CharUnits::fromQuantity(64)) { ElemTy = llvm::Type::getInt32Ty(getVMContext()); SizeRegs = (getContext().getTypeSize(Ty) + 31) / 32; } else if (getABIKind() == ARMABIInfo::APCS) { -- cgit v1.2.3