From 07f1624aa2f5089c47a2ff6b02a635af899fa91d Mon Sep 17 00:00:00 2001 From: Tim Northover Date: Fri, 18 Apr 2014 10:47:44 +0000 Subject: ARM64: make sure HFAs on the stack get properly aligned. Another AAPCS bug, part of PR19432. llvm-svn: 206580 --- clang/lib/CodeGen/TargetInfo.cpp | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) (limited to 'clang/lib/CodeGen/TargetInfo.cpp') diff --git a/clang/lib/CodeGen/TargetInfo.cpp b/clang/lib/CodeGen/TargetInfo.cpp index e9bb3cdb08b..47c5269ec5a 100644 --- a/clang/lib/CodeGen/TargetInfo.cpp +++ b/clang/lib/CodeGen/TargetInfo.cpp @@ -3187,13 +3187,14 @@ private: // Under AAPCS the 64-bit stack slot alignment means we can't pass HAs // as sequences of floats since they'll get "holes" inserted as // padding by the back end. - if (IsHA && AllocatedVFP > NumVFPs && !isDarwinPCS()) { - uint32_t NumStackSlots = getContext().getTypeSize(it->type); - NumStackSlots = llvm::RoundUpToAlignment(NumStackSlots, 64) / 64; - - llvm::Type *CoerceTy = llvm::ArrayType::get( - llvm::Type::getDoubleTy(getVMContext()), NumStackSlots); - it->info = ABIArgInfo::getDirect(CoerceTy); + if (IsHA && AllocatedVFP > NumVFPs && !isDarwinPCS() && + getContext().getTypeAlign(it->type) < 64) { + uint32_t NumStackSlots = getContext().getTypeSize(it->type); + NumStackSlots = llvm::RoundUpToAlignment(NumStackSlots, 64) / 64; + + llvm::Type *CoerceTy = llvm::ArrayType::get( + llvm::Type::getDoubleTy(getVMContext()), NumStackSlots); + it->info = ABIArgInfo::getDirect(CoerceTy); } // If we do not have enough VFP registers for the HA, any VFP registers -- cgit v1.2.3