From 33e67ad098e3e3cb5e2565decaaac85123d7f004 Mon Sep 17 00:00:00 2001 From: Krzysztof Parzyszek Date: Fri, 21 Jul 2017 18:07:15 +0000 Subject: [Hexagon] Add inline-asm constraint 'a' for modifier register class For example asm ("memw(%0++%1) = %2" : : "r"(addr),"a"(mod),"r"(val) : "memory") llvm-svn: 308763 --- clang/lib/Basic/Targets.cpp | 3 +++ 1 file changed, 3 insertions(+) (limited to 'clang/lib/Basic/Targets.cpp') diff --git a/clang/lib/Basic/Targets.cpp b/clang/lib/Basic/Targets.cpp index 01137b66b38..d488ed1dbd7 100644 --- a/clang/lib/Basic/Targets.cpp +++ b/clang/lib/Basic/Targets.cpp @@ -6887,6 +6887,9 @@ public: return true; } break; + case 'a': // Modifier register m0-m1. + Info.setAllowsRegister(); + return true; case 's': // Relocatable constant. return true; -- cgit v1.2.3