summaryrefslogtreecommitdiffstats
path: root/llvm
Commit message (Collapse)AuthorAgeFilesLines
* [NVPTX] Read __CUDA_FTZ from module flags in NVVMReflect.Justin Lebar2016-04-012-7/+30
| | | | | | | | | | | | | | | | | | | Summary: Previously the NVVMReflect pass would read its configuration from command-line flags or a static configuration given to the pass at instantiation time. This doesn't quite work for clang's use-case. It needs to pass a value for __CUDA_FTZ down on a per-module basis. We use a module flag for this, so the NVVMReflect pass needs to be updated to read said flag. Reviewers: tra, rnk Subscribers: cfe-commits, jholewinski Differential Revision: http://reviews.llvm.org/D18672 llvm-svn: 265090
* [NVPTX] Annotate some instructions as hasSideEffects = 0.Justin Lebar2016-04-012-146/+171
| | | | | | | | | | | | | | | | | | | | Summary: Tablegen tries to infer this from the selection DAG patterns defined for the instructions, but it can't always. An instructive example is CLZr64. CLZr32 is correctly inferred to have no side-effects, but the selection DAG pattern for CLZr64 is slightly more complicated, and in particular the ctlz DAG node is not at the root of the pattern. Thus tablegen can't infer that CLZr64 has no side-effects. Reviewers: jholewinski Subscribers: jholewinski, tra, llvm-commits Differential Revision: http://reviews.llvm.org/D17472 llvm-svn: 265089
* [ifcnv] Add brief comment explaining what ifcnv is.Justin Lebar2016-04-011-1/+2
| | | | llvm-svn: 265088
* Fix Windows build (typo in disk_space() implementation)Mehdi Amini2016-04-011-1/+1
| | | | | From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 265087
* [LoopVectorize] Don't unconditionally print vectorization diagnosticsAkira Hatanaka2016-04-013-23/+60
| | | | | | | | | | | | | | | | | when compiling with LTO. r244523 a new class DiagnosticInfoOptimizationRemarkAnalysisAliasing for optimization analysis remarks related to pointer aliasing without guarding it in isDiagnosticEnabled in LLVMContext.cpp. This caused the diagnostic message to be printed unconditionally when compiling with LTO. This commit cleans up isDiagnosticEnabled and makes sure all the vectorization optimization remarks are guarded. rdar://problem/25382153 llvm-svn: 265084
* Add disk_space() to llvm::fsMehdi Amini2016-04-013-1/+56
| | | | | | | | | | Summary: Adapted from Boost::filesystem. (This is a reapply by reverting commit r265080 and fixing the WinAPI part) Differential Revision: http://reviews.llvm.org/D18467 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 265082
* testcase gardening: update the emissionKind enum to the new syntax. (NFC)Adrian Prantl2016-04-01481-498/+498
| | | | llvm-svn: 265081
* Revert "Add disk_space() to llvm::fs"Mehdi Amini2016-04-013-56/+1
| | | | | | | | This reverts commit r265074 and r265068. Breaks windows build From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 265080
* Fix a captialization error in r265077.Adrian Prantl2016-04-011-1/+1
| | | | llvm-svn: 265079
* Move the DebugEmissionKind enum from DIBuilder into DICompileUnit.Adrian Prantl2016-03-31216-236/+319
| | | | | | | | | | | | | This mostly cosmetic patch moves the DebugEmissionKind enum from DIBuilder into DICompileUnit. DIBuilder is not the right place for this enum to live in — a metadata consumer should not have to include DIBuilder.h. I also added a Verifier check that checks that the emission kind of a DICompileUnit is actually legal. http://reviews.llvm.org/D18612 <rdar://problem/25427165> llvm-svn: 265077
* Follow-up to r265036: I got these iterators mixed upHans Wennborg2016-03-311-2/+2
| | | | llvm-svn: 265076
* clang-format the large enum definitions in LLVMBitCodes.hMehdi Amini2016-03-311-447/+447
| | | | | | | Suggestion from Duncan in a review thread. From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 265075
* Use const ref instead of value for Twine in the disk_space() APIMehdi Amini2016-03-313-3/+3
| | | | | | | Thanks Rui for noticing! From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 265074
* lit: python3 compatibility fixMatthias Braun2016-03-311-1/+8
| | | | llvm-svn: 265070
* Create thin archive in GNU format to fix test on OS X.Peter Collingbourne2016-03-311-1/+2
| | | | llvm-svn: 265069
* Add disk_space() to llvm::fsMehdi Amini2016-03-313-1/+56
| | | | | | | | | | Summary: Adapted from Boost::filesystem. (This is a reapply by reverting commit r265062 and fixing the WinAPI part) Differential Revision: http://reviews.llvm.org/D18467 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 265068
* Move asm-printer-topological-order.ll to PowerPC backendTim Shen2016-03-311-1/+1
| | | | llvm-svn: 265067
* Object: Add function for moving thin archive object buffer vector out of ↵Peter Collingbourne2016-03-311-0/+4
| | | | | | | | Archive. Differential Revision: http://reviews.llvm.org/D18664 llvm-svn: 265066
* Object: Correctly read thin archives containing absolute paths.Peter Collingbourne2016-03-312-3/+13
| | | | | | Differential Revision: http://reviews.llvm.org/D18666 llvm-svn: 265065
* [AsmPrinter] Print aliases in topological orderTim Shen2016-03-312-1/+33
| | | | | | | | | | Print aliases in topological order, that is, for any alias a = b, b must be printed before a. This is because on some targets (e.g. PowerPC) linker expects aliases in such an order to generate correct TOC information. GCC also prints aliases in topological order. llvm-svn: 265064
* Fix PR26940 where compiles times regressed massively.Chandler Carruth2016-03-311-33/+30
| | | | | | | | | | | | | | | Patch by Jonas Paulsson. Original description: Bugfix in buildSchedGraph() to make -dag-maps-huge-region work properly I found that the reduction of the maps did in fact never happen in this test case. This was because *all* the stores / loads were made with addresses from arguments and they thus became "unknown" stores / loads. Fixed by removing continue statements and making sure that the test for reduction always takes place. Differential Revision: http://reviews.llvm.org/D18673 llvm-svn: 265063
* Revert "Add disk_space() to llvm::fs"Mehdi Amini2016-03-313-55/+1
| | | | | | | | | Breaks windows bot. This reverts commit r265050. This reverts commit r265055. From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 265062
* Preserve blockaddress use edges in the module splitter.Evgeniy Stepanov2016-03-312-45/+83
| | | | | | | | "blockaddress" can not apply to an external function. All blockaddress constant uses must belong to the same module as the definition of the target function. llvm-svn: 265061
* [NVPTX] Infer __nvvm_reflect as nounwind, readnoneDavid Majnemer2016-03-314-1/+24
| | | | | | | | | | This patch simply mirrors the attributes we give to @llvm.nvvm.reflect to the __nvvm_reflect libdevice call. This shaves about 30% of the code in libdevice away because of CSE opportunities. It's also helps us figure out that libdevice implementations of transcendental functions don't have side-effects. llvm-svn: 265060
* Wdocumentation parameter fixSimon Pilgrim2016-03-311-2/+0
| | | | llvm-svn: 265055
* fix typo; NFCSanjay Patel2016-03-311-2/+1
| | | | llvm-svn: 265054
* Fixed signed/unsigned warningSimon Pilgrim2016-03-311-1/+1
| | | | llvm-svn: 265052
* [AArch64] Allow loads with imp-def to be handled in getMemOpBaseRegImmOfsWidth()Jun Bum Lim2016-03-313-2/+37
| | | | | | | | | | | | | | Summary: This change will allow loads with imp-def to be clustered in machine-scheduler pass. areMemAccessesTriviallyDisjoint() can also handle loads with imp-def. Reviewers: mcrosier, jmolloy, t.p.northover Subscribers: aemerson, rengolin, mcrosier, llvm-commits Differential Revision: http://reviews.llvm.org/D18665 llvm-svn: 265051
* Add disk_space() to llvm::fsMehdi Amini2016-03-313-1/+57
| | | | | | | | | | | | | Summary: Adapted from Boost::filesystem. Reviewers: bruno, silvas Subscribers: tberghammer, danalbert, llvm-commits, srhines Differential Revision: http://reviews.llvm.org/D18467 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 265050
* [PowerPC] Cleanup test/CodeGen/PowerPC/qpx-load-splat.llHal Finkel2016-03-311-14/+6
| | | | | | Removing unnecessary attributes and metadata... llvm-svn: 265049
* [x86] add memset tests to show another potential improvementSanjay Patel2016-03-311-0/+203
| | | | llvm-svn: 265048
* [PowerPC] Add a late MI-level pass for QPX load/splat simplificationHal Finkel2016-03-316-4/+253
| | | | | | | | | | | | | | | Chapter 3 of the QPX manual states that, "Scalar floating-point load instructions, defined in the Power ISA, cause a replication of the source data across all elements of the target register." Thus, if we have a load followed by a QPX splat (from the first lane), the splat is redundant. This adds a late MI-level pass to remove the redundant splats in some of these cases (specifically when both occur in the same basic block). This optimization is scheduled just prior to post-RA scheduling. It can't happen before anything that might replace the load with some already-computed quantity (i.e. store-to-load forwarding). llvm-svn: 265047
* Revert r265039 "[X86] Merge adjacent stack adjustments in ↵Hans Wennborg2016-03-319-65/+30
| | | | | | | | | | eliminateCallFramePseudoInstr (PR27140)" I think it might have caused these build breakages: http://lab.llvm.org:8011/builders/clang-x86-win2008-selfhost/builds/7234/steps/build%20stage%202/logs/stdio http://lab.llvm.org:8011/builders/sanitizer-windows/builds/19566/steps/run%20tests/logs/stdio llvm-svn: 265046
* [X86][SSE] Some basic tests for variable shufflesSimon Pilgrim2016-03-312-0/+1942
| | | | | | We don't really support non-constant shuffle masks, but these tests are for cases where BUILD_VECTOR is made up from vector extracts (as well as undef/zero scalars). llvm-svn: 265045
* Preserve extern_weak linkage in CloneModule.Evgeniy Stepanov2016-03-312-10/+27
| | | | | | | Only force "extern" linkage if the function used to be a definition in the source module. Declarations keep their original linkage. llvm-svn: 265043
* [CMake] Provide the ability to skip stripping when generating dSYMsChris Bieneman2016-03-311-1/+6
| | | | | | For debugging it is useful to be able to generate dSYM files but not strip the executables. This change adds the ability to skip stripping by setting LLVM_EXTERNALIZE_DEBUGINFO_SKIP_STRIP=On. llvm-svn: 265041
* [ARM] Expand v1i64 and v2i64 ctpop.Benjamin Kramer2016-03-312-0/+18
| | | | | | | The default is legal, which results in 'Cannot select' errors. This is triggered during selfhost due to a recent cost model change. llvm-svn: 265040
* [X86] Merge adjacent stack adjustments in eliminateCallFramePseudoInstr ↵Hans Wennborg2016-03-319-30/+65
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | (PR27140) For code such as: void f(int, int); void g() { f(1, 2); } compiled for 32-bit X86 Linux, Clang would previously generate: subl $12, %esp subl $8, %esp pushl $2 pushl $1 calll f addl $16, %esp addl $12, %esp retl This patch fixes that by merging adjacent stack adjustments in eliminateCallFramePseudoInstr(). Differential Revision: http://reviews.llvm.org/D18627 llvm-svn: 265039
* Change eliminateCallFramePseudoInstr() to return an iteratorHans Wennborg2016-03-3133-96/+85
| | | | | | | | | | | | | | | | | | | | | This will become necessary in a subsequent change to make this method merge adjacent stack adjustments, i.e. it might erase the previous and/or next instruction. It also greatly simplifies the calls to this function from Prolog- EpilogInserter. Previously, that had a bunch of logic to resume iteration after the call; now it just continues with the returned iterator. Note that this changes the behaviour of PEI a little. Previously, it attempted to re-visit the new instruction created by eliminateCallFramePseudoInstr(). That code was added in r36625, but I can't see any reason for it: the new instructions will obviously not be pseudo instructions, they will not have FrameIndex operands, and we have already accounted for the stack adjustment. Differential Revision: http://reviews.llvm.org/D18627 llvm-svn: 265036
* [lit][googletest] Handle upstream gtest outputDaniel Dunbar2016-03-314-0/+67
| | | | | | | | | | | | | | | | | | | Summary: Upstream googletest prints "Running main() from gtest_main.cc" to stdout prior to running tests. LLVM removed that print statement in r61540. If a user were to use lit to run tests that use upstream googletest, however, lit reports "Running main()" as an invalid test name. To avoid such a failure, add an extra conditional to `formats/googletest.py`. Also add tests to demonstrate the modified behavior. Reviewers: abdulras, ddunbar Subscribers: ddunbar, llvm-commits, kastiglione Differential Revision: http://reviews.llvm.org/D18606 llvm-svn: 265034
* [lanai] isBrImm should accept any non-constant immediate.Jacques Pienaar2016-03-312-17/+19
| | | | | | | | isBrImm should accept any non-constant immediate. Previously it was only accepting LanaiMCExpr ones which was wrong. Differential Revision: http://reviews.llvm.org/D18571 llvm-svn: 265032
* [PPC] basic support for Power 9 direct move instructionsEhsan Amiri2016-03-313-2/+39
| | | | | | | | http://reviews.llvm.org/D18097 Initial support does not include any patterns to generate this instructions llvm-svn: 265031
* [PGO] use emplace_back. NFC.Rong Xu2016-03-311-1/+1
| | | | | | Use emplace_back instead of push_back for simplicity. llvm-svn: 265030
* [x86] use SSE/AVX ops for non-zero memsets (PR27100)Sanjay Patel2016-03-312-56/+138
| | | | | | | | | | | | | | Move the memset check down to the CPU-with-slow-SSE-unaligned-memops case: this allows fast targets to take advantage of SSE/AVX instructions and prevents slow targets from stepping into a codegen sinkhole while trying to splat a byte into an XMM reg. Follow-on bugs exposed by the current codegen are: https://llvm.org/bugs/show_bug.cgi?id=27141 https://llvm.org/bugs/show_bug.cgi?id=27143 Differential Revision: http://reviews.llvm.org/D18566 llvm-svn: 265029
* [AMDGPU] enable few disassembler tests that were mistakenly marked as FIXME.Valery Pykhtin2016-03-311-8/+8
| | | | llvm-svn: 265028
* More checks in win32-seh-nested-finally.ll after comment on r264966Hans Wennborg2016-03-311-0/+3
| | | | llvm-svn: 265027
* [PowerPC] Attempt to fix fast-isel-i64offset.ll failureUlrich Weigand2016-03-311-4/+1
| | | | | | | The test case added in r265023 is failing on ninja-x64-msvc-RA-centos6. Update the test to make less specific assumptions on code generation. llvm-svn: 265026
* Minor code cleanup /NFCXinliang David Li2016-03-311-4/+6
| | | | llvm-svn: 265025
* Don't use potentially invalidated iteratorStephan Bergmann2016-03-311-2/+4
| | | | | | | | | | | | If the lhs is evaluated before the rhs, FuncletI's operator-> can trigger the assert(isHandleInSync() && "invalid iterator access!"); at include/llvm/ADT/DenseMap.h:1061. (Happens e.g. when compiled with GCC 6.) Differential Revision: http://reviews.llvm.org/D18440 llvm-svn: 265024
* [PowerPC] Correctly compute 64-bit offsets in fast iselUlrich Weigand2016-03-312-6/+20
| | | | | | | | | | | | | | | | | | | | | PPCSimplifyAddress contains this code: IntegerType *OffsetTy = ((VT == MVT::i32) ? Type::getInt32Ty(*Context) : Type::getInt64Ty(*Context)); to determine the type to be used for an index register, if one needs to be created. However, the "VT" here is the type of the data being loaded or stored, *not* the type of an address. This means that if a data element of type i32 is accessed using an index that does not not fit into 32 bits, a wrong address is computed here. Note that PPCFastISel is only ever used on 64-bit currently, so the type of an address is actually *always* MVT::i64. Other parts of the code, even in this same PPCSimplifyAddress routine, already rely on that fact. Thus, this patch changes the code to simply unconditionally use Type::getInt64Ty(*Context) as OffsetTy. llvm-svn: 265023
OpenPOWER on IntegriCloud