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* Add support for targets that require stubs for external functions.Chris Lattner2005-04-181-2/+27
| | | | llvm-svn: 21313
* Handle ExternalSymbol operands in the PPC JITChris Lattner2005-04-181-9/+13
| | | | llvm-svn: 21312
* Update dejagnu tests to use the new pattern isel flagNate Begeman2005-04-165-5/+5
| | | | llvm-svn: 21311
* Add CondPropagate.cpp to VC++ Transforms projectJeff Cohen2005-04-161-0/+3
| | | | llvm-svn: 21310
* Make pattern isel default for ppcNate Begeman2005-04-156-19/+43
| | | | | | | | | | Add new ppc beta option related to using condition registers Make pattern isel control flag (-enable-pattern-isel) global and tristate 0 == off 1 == on 2 == target default llvm-svn: 21309
* new passChris Lattner2005-04-151-0/+1
| | | | llvm-svn: 21307
* a new simple pass, which will be extended to be more useful in the future.Chris Lattner2005-04-151-0/+213
| | | | | | | | | This pass forward branches through conditions when it can show that the conditions is either always true or false for a predecessor. This currently only handles the most simple cases of this, but is successful at threading across 2489 branches and 65 switch instructions in 176.gcc, which isn't bad. llvm-svn: 21306
* add a new prototypeChris Lattner2005-04-151-0/+7
| | | | llvm-svn: 21305
* new testcaseChris Lattner2005-04-152-0/+21
| | | | llvm-svn: 21304
* fix callsAndrew Lenharth2005-04-142-1/+2
| | | | llvm-svn: 21303
* a 21264 fix, and fix the operator precidence on an and -> zap check (should ↵Andrew Lenharth2005-04-142-3/+11
| | | | | | fix hundreds of test cases llvm-svn: 21302
* added a random and mask testAndrew Lenharth2005-04-141-0/+10
| | | | llvm-svn: 21301
* print negative 64 bit immediates as negative numbers, makes things a littleDuraid Madina2005-04-142-2/+9
| | | | | | | easier on the eyes, not that numbers like 18446744073709541376 are bad or anything llvm-svn: 21300
* oops, this stopped us turning movl r4=0xFFFFFFFF;; and rX, r4 into zxt4Duraid Madina2005-04-141-1/+1
| | | | llvm-svn: 21299
* Implement multi-way branches through logical ops on condition registers.Nate Begeman2005-04-142-3/+69
| | | | | | | | This can generate considerably shorter code, reducing the size of crafty by almost 1%. Also fix the printing of mcrf. The code is currently disabled until it gets a bit more testing, but should work as-is. llvm-svn: 21298
* Add a couple missing transforms in getSetCC that were triggering assertionsNate Begeman2005-04-141-1/+8
| | | | | | in the PPC Pattern ISel llvm-svn: 21297
* we have zextloads, not sextloads!Duraid Madina2005-04-141-1/+1
| | | | llvm-svn: 21296
* Add the necessary support to codegen condition register logical ops withNate Begeman2005-04-144-17/+72
| | | | | | | register allocated condition registers. Make sure that the printed output is gas compatible. llvm-svn: 21295
* Start allocating condition registers. Almost all explicit uses of CR0 areNate Begeman2005-04-131-23/+26
| | | | | | | now gone. Next step is to get rid of the remaining ones and then start allocating bools to CRs where appropriate. llvm-svn: 21294
* Implement the fold shift X, zext(Y) -> shift X, Y at the target level,Nate Begeman2005-04-131-6/+22
| | | | | | where it is safe to do so. llvm-svn: 21293
* Add CodeGen tests for the recent SelectionDAG transformsNate Begeman2005-04-132-0/+53
| | | | llvm-svn: 21292
* Disbale the broken fold of shift + sz[ext] for nowNate Begeman2005-04-132-26/+30
| | | | | | | | Move the transform for select (a < 0) ? b : 0 into the dag from ppc isel Enable the dag to fold and (setcc, 1) -> setcc for targets where setcc always produces zero or one. llvm-svn: 21291
* fix an infinite loopChris Lattner2005-04-131-1/+1
| | | | llvm-svn: 21289
* fix some serious miscompiles on ia64, alpha, and ppcChris Lattner2005-04-131-1/+1
| | | | llvm-svn: 21288
* avoid work when possible, perhaps fix the problem nate and andrew are seeingChris Lattner2005-04-131-0/+1
| | | | | | with != 0 comparisons vanishing. llvm-svn: 21287
* WOW, function calls still seem to work after this.Andrew Lenharth2005-04-133-19/+30
| | | | llvm-svn: 21286
* prepare for func call optimizationAndrew Lenharth2005-04-131-1/+1
| | | | llvm-svn: 21285
* regression case for faster call sequenceAndrew Lenharth2005-04-131-0/+15
| | | | llvm-svn: 21284
* check that casts still use zapAndrew Lenharth2005-04-131-0/+11
| | | | llvm-svn: 21283
* * add the shladd instructionDuraid Madina2005-04-132-0/+23
| | | | | | | | | | * fold left shifts of 1, 2, 3 or 4 bits into adds This doesn't save much now, but should get a serious workout once multiplies by constants get converted to shift/add/sub sequences. Hold on! :) llvm-svn: 21282
* add matches for SxADDL and company, as well as simplify the SxADDQ codeAndrew Lenharth2005-04-131-78/+48
| | | | llvm-svn: 21281
* Implement expansion of unsigned i64 -> FP.Chris Lattner2005-04-131-2/+31
| | | | | | | Note that this probably only works for little endian targets, but is enough to get siod working :) llvm-svn: 21280
* * if ANDing with a constant of the form:Duraid Madina2005-04-131-2/+45
| | | | | | | | | | | | | | | | | | | 0x00000..00FFF..FF ^ ^ ^ ^ any number of 0's followed by some number of 1's then we use dep.z to just paste zeros over the input. For the special cases where this is zxt1/zxt2/zxt4, we use those instructions instead, because we're all about readability!!! that's what it's about!! readability! *twitch* ;D llvm-svn: 21279
* added s4addl matching testAndrew Lenharth2005-04-131-0/+14
| | | | llvm-svn: 21277
* added all flavors of zap for andingAndrew Lenharth2005-04-131-0/+20
| | | | llvm-svn: 21276
* Make expansion of uint->fp cast assert out instead of infinitely recurse.Chris Lattner2005-04-131-1/+1
| | | | llvm-svn: 21275
* Fix some mysteriously missing {}'s which cause the miscompilation ofChris Lattner2005-04-131-2/+2
| | | | | | Olden/mst, Ptrdist/bc, Obsequi, etc. llvm-svn: 21274
* add back the optimization that Nate added for shl X, (zext_inreg y)Chris Lattner2005-04-131-2/+23
| | | | llvm-svn: 21273
* Oops, remove these too.Chris Lattner2005-04-131-6/+2
| | | | llvm-svn: 21272
* remove one more occurance of this that snuck inChris Lattner2005-04-131-1/+1
| | | | llvm-svn: 21271
* Remove support for ZERO_EXTEND_INREG. This pessimizes code, genering stuffChris Lattner2005-04-131-21/+0
| | | | | | | | | | | | | | | | | like this: ldah $1,1($31) lda $1,-1($1) and $0,$1,$24 instead of this: zap $0,252,$24 To get this back, the selector should recognize the ISD::AND case where this happens and emit the appropriate ZAP instruction. llvm-svn: 21270
* Remove special handling of ZERO_EXTEND_INREG. This pessimizes code, causingChris Lattner2005-04-131-17/+0
| | | | | | | | | | | | | | | things like this: mov r9 = 65535;; and r8 = r8, r9;; To be emitted instead of: zxt2 r8 = r8;; To get this back, the selector for ISD::AND should recognize this case. llvm-svn: 21269
* Elimate handling of ZERO_EXTEND_INREG. This causes the PPC backend to emitChris Lattner2005-04-132-25/+0
| | | | | | | andi instructions instead of rlwinm instructions for zero extend, but they seem like they would take the same time. llvm-svn: 21268
* Z_E_I is goneChris Lattner2005-04-131-2/+0
| | | | llvm-svn: 21267
* Instead of making ZERO_EXTEND_INREG nodes, use the helper method inChris Lattner2005-04-131-31/+22
| | | | | | | SelectionDAG to do the job with AND. Don't legalize Z_E_I anymore as it is gone llvm-svn: 21266
* Remove all foldings of ZERO_EXTEND_INREG, moving them to work for AND nodesChris Lattner2005-04-131-41/+46
| | | | | | instead. OVerall, this increases the amount of folding we can do. llvm-svn: 21265
* Add a new helper method which returns the and that is equivalent to whatChris Lattner2005-04-131-0/+4
| | | | | | ZERO_EXTEND_INREG was. llvm-svn: 21264
* Remove the ZERO_EXTEND_INREG node which is redundant with ANDChris Lattner2005-04-131-7/+5
| | | | llvm-svn: 21263
* Fold shift x, [sz]ext(y) -> shift x, yNate Begeman2005-04-121-0/+16
| | | | llvm-svn: 21262
* Fold shift by size larger than type size to undefNate Begeman2005-04-123-20/+5
| | | | | | Make llvm undef values generate ISD::UNDEF nodes llvm-svn: 21261
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