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* CanLowerReturn doesn't need a SelectionDAG; it just needs an LLVMContext.Dan Gohman2010-07-068-13/+12
| | | | | | SelectBasicBlock doesn't needs its BasicBlock argument. llvm-svn: 107712
* Propagate debug loc.Devang Patel2010-07-0621-54/+64
| | | | llvm-svn: 107710
* Represent NEON load/store alignments in bytes, not bits.Bob Wilson2010-07-063-7/+13
| | | | llvm-svn: 107701
* One more case assuming that subregs have live ranges.Jakob Stoklund Olesen2010-07-061-2/+2
| | | | llvm-svn: 107700
* Closing tags start with slashes.John McCall2010-07-061-2/+2
| | | | llvm-svn: 107699
* Fix buildbot breakage where a def is missing.Jakob Stoklund Olesen2010-07-061-0/+2
| | | | llvm-svn: 107698
* Add fixme.Devang Patel2010-07-061-0/+1
| | | | llvm-svn: 107697
* minor typoChris Lattner2010-07-061-1/+1
| | | | llvm-svn: 107696
* Be more forgiving when calculating alias interference for physreg coalescing.Jakob Stoklund Olesen2010-07-065-116/+62
| | | | | | | | | | | | It is OK for an alias live range to overlap if there is a copy to or from the physical register. CoalescerPair can work out if the copy is coalescable independently of the alias. This means that we can join with the actual destination interval instead of using the getOrigDstReg() hack. It is no longer necessary to merge clobber ranges into subregisters. llvm-svn: 107695
* Reapply r107655 with fixes; insert the pseudo instruction intoDan Gohman2010-07-0615-212/+280
| | | | | | | the block before calling the expansion hook. And don't put EFLAGS in a mbb's live-in list twice. llvm-svn: 107691
* Add X86_64 ELF relocation values and ELF64 relocation classes.Matt Fleming2010-07-061-0/+73
| | | | | | Patch from Roman Divacky. llvm-svn: 107688
* Add some more ELF OSABI values as found in the System V ApplicationMatt Fleming2010-07-061-2/+21
| | | | | | Binary Interface specification. llvm-svn: 107685
* Fix to 80-col.Eric Christopher2010-07-061-21/+21
| | | | llvm-svn: 107684
* Provide IRBuilder conveniences for creating integer constants at common widths,John McCall2010-07-061-6/+61
| | | | | | and give a more precise return type for some of the type-creation methods. llvm-svn: 107683
* Alphabetize the list of function parameters.Nick Lewycky2010-07-061-15/+15
| | | | llvm-svn: 107680
* Fix PR7545 crash.Devang Patel2010-07-062-3/+32
| | | | llvm-svn: 107678
* Provide an abstraction to save and restore the current insertion point ofJohn McCall2010-07-061-0/+42
| | | | | | an IRBuilder. llvm-svn: 107677
* Don't create neon moves in CopyRegToReg. NEONMoveFixPass will do the conversionRafael Espindola2010-07-062-5/+7
| | | | | | if profitable. llvm-svn: 107673
* tighten up this code.Chris Lattner2010-07-061-12/+7
| | | | llvm-svn: 107670
* Bring the list of passes and their descriptions up to date.Duncan Sands2010-07-061-162/+539
| | | | | | Patch by Kenneth Hoste. llvm-svn: 107669
* Revert r107655.Dan Gohman2010-07-0614-274/+209
| | | | llvm-svn: 107668
* second round of low-level interface squeeze-out:Gabor Greif2010-07-061-2/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | making all of CallInst's low-level operand accessors private If you get compile errors I strongly urge you to update your code. I tried to write the necessary clues into the header where the compiler may point to, but no guarantees. It works for my GCC. You have several options to update your code: - you can use the v2.8 ArgOperand accessors - you can go via a temporary CallSite - you can upcast to, say, User and call its low-level accessors if your code is definitely operand-order agnostic. If you run into serious problems, please comment in below thread (and back out this revision only if absolutely necessary): <http://groups.google.com/group/llvm-dev/browse_thread/thread/64650cf343b28271> llvm-svn: 107667
* Add versions of OutputArgReg, AnalyzeReturn, and AnalyzeCallOperandsDan Gohman2010-07-063-0/+56
| | | | | | which do not depend on SelectionDAG. llvm-svn: 107666
* Add a new CCValAssign LocInfo value, and a comment explaining what itDan Gohman2010-07-061-0/+3
| | | | | | should be used for. llvm-svn: 107661
* Make getMinimalPhysRegClass' comment mention what makes it differentDan Gohman2010-07-062-2/+4
| | | | | | from getPhysicalRegisterRegClass. llvm-svn: 107660
* Note the relationship between C99 restrict and LLVM noalias, andDan Gohman2010-07-062-4/+15
| | | | | | clarify a few other things. llvm-svn: 107659
* Fix a major regression on COFF targets introduced by r103267: 'discardable' ↵Anton Korobeynikov2010-07-061-1/+1
| | | | | | | | section means that it is used only during the program load and can be discarded afterwards. This way *only* debug sections can be discarded, but not the opposite. Seems like the copy-and-pasto from ELF code, since there it contains the reverse flag ('alloc'). llvm-svn: 107658
* Add some more TODO comments.Dan Gohman2010-07-061-0/+6
| | | | llvm-svn: 107657
* Add a comment.Dan Gohman2010-07-061-1/+2
| | | | llvm-svn: 107656
* Fix a bunch of custom-inserter functions to handle the case whereDan Gohman2010-07-0614-209/+274
| | | | | | the pseudo instruction is not at the end of the block. llvm-svn: 107655
* Remove mistakenly added test.Eric Christopher2010-07-061-25/+0
| | | | llvm-svn: 107641
* Fix up -fstack-protector on linux to use the segmentEric Christopher2010-07-067-6/+107
| | | | | | | | | registers. Split out testcases per architecture and os now. Patch from Nelson Elhage. llvm-svn: 107640
* Detabify this file.Nick Lewycky2010-07-061-7/+7
| | | | llvm-svn: 107637
* Add default value to setIsNoInline for parity with the other methods of itsNick Lewycky2010-07-061-15/+7
| | | | | | | | kind. Also fold some functions that fit on a line to a single line. llvm-svn: 107636
* Fix typo 'getter' where 'setter' was intended.Nick Lewycky2010-07-061-2/+2
| | | | llvm-svn: 107635
* Have the X86 backend use Triple instead of a string and some enums.Eric Christopher2010-07-053-64/+38
| | | | llvm-svn: 107625
* Remove some unused/redundant code.Kalle Raiskila2010-07-052-20/+0
| | | | llvm-svn: 107622
* more tidying.Chris Lattner2010-07-052-10/+5
| | | | llvm-svn: 107615
* another v2f32 case, in this case showing poor codegen.Chris Lattner2010-07-051-1/+16
| | | | llvm-svn: 107614
* some notes about suboptimal insertps'sChris Lattner2010-07-051-0/+31
| | | | llvm-svn: 107613
* random tidyingChris Lattner2010-07-052-41/+43
| | | | llvm-svn: 107612
* rip out even more sporadic v2f32 support.Chris Lattner2010-07-053-19/+1
| | | | llvm-svn: 107610
* rip out the various v2f32 "mmx" handling logic, now that Chris Lattner2010-07-051-6/+6
| | | | | | v2f32 is illegal on x86. llvm-svn: 107609
* fix test on non-x86 hosts.Chris Lattner2010-07-051-1/+1
| | | | llvm-svn: 107608
* Print symbolic subreg indices on REG_SEQUENCE and INSERT_SUBREG.Jakob Stoklund Olesen2010-07-041-0/+2
| | | | llvm-svn: 107602
* Just rip v2f32 support completely out of the X86 backend. InChris Lattner2010-07-042-28/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | the example in the testcase, we now generate: _test1: ## @test1 movss 4(%esp), %xmm0 addss 8(%esp), %xmm0 movl 12(%esp), %eax movss %xmm0, (%eax) ret instead of: _test1: ## @test1 subl $20, %esp movl 24(%esp), %eax movq %mm0, (%esp) movq %mm0, 8(%esp) movss (%esp), %xmm0 addss 12(%esp), %xmm0 movss %xmm0, (%eax) addl $20, %esp ret v2f32 support did not work reliably because most of the X86 backend didn't know it was legal. It was apparently only added to support returning source-level v2f32 values in MMX registers in x86-32 mode. If ABI compatibility is important on this GCC-extended-vector type for some reason, then the frontend should generate IR that returns v2i32 instead of v2f32. However, we generally don't try very hard to be abi compatible on gcc extended vectors. llvm-svn: 107601
* fix PR7518 - terrible codegen of <2 x float>, by only markingChris Lattner2010-07-042-6/+32
| | | | | | | | v2f32 as legal in 32-bit mode. It is just as terrible there, but I just care about x86-64 and noone claims it is valuable in 64-bit mode. llvm-svn: 107600
* indentationChris Lattner2010-07-041-2/+3
| | | | llvm-svn: 107599
* Infer alignments of fixed frame objects when they are constructed. This ↵Evan Cheng2010-07-042-18/+7
| | | | | | ensures remat'ed loads from fixed slots have the right alignments. llvm-svn: 107591
* indmemrem and lowerallocs are gone.Chris Lattner2010-07-041-35/+0
| | | | llvm-svn: 107587
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