summaryrefslogtreecommitdiffstats
path: root/llvm
Commit message (Collapse)AuthorAgeFilesLines
* [PowerPC] Zero-extend the compare operand for ATOMIC_CMP_SWAPNemanja Ivanovic2018-01-125-0/+199
| | | | | | | | | | | | Part of the fix for https://bugs.llvm.org/show_bug.cgi?id=35812. This patch ensures that the compare operand for the atomic compare and swap is properly zero-extended to 32 bits if applicable. A follow-up commit will fix the extension for the SETCC node generated when expanding an ATOMIC_CMP_SWAP_WITH_SUCCESS. That will complete the bug fix. Differential Revision: https://reviews.llvm.org/D41856 llvm-svn: 322372
* Revert "[PowerPC] Manually schedule the prologue and epilogue"Stefan Pintilie2018-01-126-114/+56
| | | | | | | This reverts commit r322124 since some tests were broken by that patch. Will recommmit once the patch is fixed. llvm-svn: 322369
* [ARM GlobalISel] Add inst selector tests for G_FMADiana Picus2018-01-122-0/+253
| | | | | | | We don't yet match all the patterns involving G_FMA. Add tests for some of the ones that we do match. llvm-svn: 322368
* [ARM GlobalISel] Map G_FMA to FPRDiana Picus2018-01-122-2/+72
| | | | llvm-svn: 322367
* [ARM GlobalISel] Legalize G_FMADiana Picus2018-01-123-2/+137
| | | | | | | | | | | For hard float with VFP4, it is legal. Otherwise, we use libcalls. This needs a bit of support in the LegalizerHelper for soft float because we didn't handle G_FMA libcalls yet. The support is trivial, as the only difference between G_FMA and other libcalls that we already handle is that it has 3 input operands rather than just 2. llvm-svn: 322366
* [IRCE][NFC] Make range check's End a non-null SCEVMax Kazantsev2018-01-122-17/+19
| | | | | | | | | | | | | Currently, IRC contains `Begin` and `Step` as SCEVs and `End` as value. Aside from that, `End` can also be `nullptr` which can be later conditionally converted into a non-null SCEV. To make this logic more transparent, this patch makes `End` a SCEV and calculates it early, so that it is never a null. Differential Revision: https://reviews.llvm.org/D39590 llvm-svn: 322364
* [ARM] Add codegen for SMMULR, SMMLAR and SMMLSRAndre Vieira2018-01-125-61/+292
| | | | | | | | | This patch teaches the Arm back-end to generate the SMMULR, SMMLAR and SMMLSR instructions from equivalent IR patterns. Differential Revision: https://reviews.llvm.org/D41775 llvm-svn: 322361
* [ARM] Fix erroneous availability of SMMLS for Armv7-MAndre Vieira2018-01-123-2/+5
| | | | | | Differential Revision: https://reviews.llvm.org/D41855 llvm-svn: 322360
* [CGP] Re-enable Select in complex addressing modeSerguei Katkov2018-01-122-2/+2
| | | | | | | | Re-enable Select after a couple of fixes. Differential Revision: https://reviews.llvm.org/D40634 llvm-svn: 322358
* [LoopDeletion] Handle users in unreachable blockSerguei Katkov2018-01-122-0/+50
| | | | | | | | | | | | | | This is a fix for PR35884. When we want to delete dead loop we must clean uses in unreachable blocks otherwise we'll get an assert during deletion of instructions from the loop. Reviewers: anna, davide Reviewed By: anna Subscribers: llvm-commits, lebedev.ri Differential Revision: https://reviews.llvm.org/D41943 llvm-svn: 322357
* [X86] Don't allow lods/stos/scas/cmps/movs to be parsed without a suffix and ↵Craig Topper2018-01-121-20/+20
| | | | | | | | only memory operand in at&t syntax. Without a register with a size being mentioned the instruction is ambiguous in at&t syntax. With Intel syntax the memory operation caries a size that can be used to disambiguate. llvm-svn: 322356
* [X86] Don't require suffix on 'clr' mnemonic in intel syntaxCraig Topper2018-01-121-4/+4
| | | | llvm-svn: 322355
* [X86] Add 'l' and 'q' suffixes to the tbm instruction mnemonics.Craig Topper2018-01-129-202/+202
| | | | | | While the suffix isn't required to disambiguate the instructions, it is required in order to parse the instructions when the suffix is specified in order to match the GNU assembler. llvm-svn: 322354
* [X86] Disable sldtq parsing in 64-bit mode.Craig Topper2018-01-121-2/+2
| | | | llvm-svn: 322353
* [X86] Disable movsq/stosq/scasqcmpsq/lodsq parsing in 64-bit mode.Craig Topper2018-01-121-5/+10
| | | | llvm-svn: 322352
* [CMake] Add LLVM_ENABLE_IDE option to better process sources for IDE'sEric Fiselier2018-01-122-1/+8
| | | | | | | | | | | | | | | | | | | | | Summary: Currently LLVM has no way to support configuring for IDE's like CLion. Like XCode and MSVC's IDE, CLion needs to see all of the headers and tablegen files in order to properly parse the sources. This patch adds an `LLVM_ENABLE_IDE` option which can be used to configure for IDE's in general. It is used by `LLVMProcessSources.cmake` to determine if the extra source files should be added to the target. Unfortunately because of the low level of `LLVMProcessSources.cmake`, I'm not sure where the `LLVM_ENABLE_IDE` option should live. I choose `HandleLLVMOptions.cmake` so that out-of-tree Clang builds would correctly configure the option by default. Reviewers: beanz, mgorny, lebedev.ri Reviewed By: beanz Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D40219 llvm-svn: 322349
* Instead of ELFFile<ELFT>::Type, use ELFT::Type. NFC.Rui Ueyama2018-01-126-60/+57
| | | | llvm-svn: 322346
* [RISCV] Pass MCSubtargetInfo to print methods.Ana Pazos2018-01-124-9/+140
| | | | | | | | | | | | | | | | Summary: This change allows checking for ISA extensions in print methods. Reviewers: asb, niosHD Reviewed By: asb, niosHD Subscribers: llvm-commits, niosHD, asb, rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal Differential Revision: https://reviews.llvm.org/D41503 llvm-svn: 322345
* Fix typo.Rui Ueyama2018-01-121-2/+2
| | | | llvm-svn: 322344
* [WebAssembly] Don't allow functions to be named twiceSam Clegg2018-01-122-1/+34
| | | | | | | | The spec doesn't allow this. Differential Revision: https://reviews.llvm.org/D41974 llvm-svn: 322343
* Use ELF{32,64}{LE,BE} instead of ELFType<{little,big}, {true,false}>. NFC.Rui Ueyama2018-01-124-21/+15
| | | | llvm-svn: 322342
* [ORC] Add a stub ExecutionSession and VModuleKey type.Lang Hames2018-01-122-1/+25
| | | | | | | | | | ExecutionSession will represent a running JIT program. VModuleKey is a unique key assigned to each module added as part of an ExecutionSession. The Layer concept will be updated in future to require a VModuleKey when a module is added. llvm-svn: 322336
* Revert r322279 due to Skylake miscompile.David L. Jones2018-01-128-415/+449
| | | | | | | | | | | | Summary: This revision causes Skylake (and apparently, only Skylake) codegen to fail in certain cases. Details: https://bugs.llvm.org/show_bug.cgi?id=35918 Subscribers: sanjoy, llvm-commits Differential Revision: https://reviews.llvm.org/D41972 llvm-svn: 322335
* [WebAssembly] MC: Remove SetUsed argument when calling MCSymbol::isDefined et alSam Clegg2018-01-111-7/+7
| | | | | | | | | | | | | Summary: This argument (the isUsed flag) seems to only be relevant when parsing. Other calls sites such as these don't seem to ever use it. Subscribers: jfb, dschuff, jgravelle-google, aheejin, sunfish Differential Revision: https://reviews.llvm.org/D41970 llvm-svn: 322332
* [InstSimplify] fold implied cmp with zero (PR35790)Sanjay Patel2018-01-112-24/+50
| | | | | | | | | This doesn't handle the more complicated case in the bug report yet: https://bugs.llvm.org/show_bug.cgi?id=35790 For that, we have to match / look through a cast. llvm-svn: 322327
* PeepholeOpt cleanup/refactor; NFCMatthias Braun2018-01-111-440/+370
| | | | | | | | | | | | | | | | | | - Less unnecessary use of `auto` - Add early `using RegSubRegPair(AndIdx) =` to avoid countless `TargetInstrInfo::` qualifications. - Use references instead of pointers where possible. - Remove unused parameters. - Rewrite the CopyRewriter class hierarchy: - Pull out uncoalescable copy rewriting functionality into PeepholeOptimizer class. - Use an abstract base class to make it clear that rewriters are independent. - Remove unnecessary \brief in doxygen comments. - Remove unused constructor and method from ValueTracker. - Replace UseAdvancedTracking of ValueTracker with DisableAdvCopyOpt use. llvm-svn: 322325
* [hwasan] Stack instrumentation.Evgeniy Stepanov2018-01-113-3/+214
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Very basic stack instrumentation using tagged pointers. Tag for N'th alloca in a function is built as XOR of: * base tag for the function, which is just some bits of SP (poor man's random) * small constant which is a function of N. Allocas are aligned to 16 bytes. On every ReturnInst allocas are re-tagged to catch use-after-return. This implementation has a bunch of issues that will be taken care of later: 1. lifetime intrinsics referring to tagged pointers are not recognized in SDAG. This effectively disables stack coloring. 2. Generated code is quite inefficient. There is one extra instruction at each memory access that adds the base tag to the untagged alloca address. It would be better to keep tagged SP in a callee-saved register and address allocas as an offset of that XOR retag, but that needs better coordination between hwasan instrumentation pass and prologue/epilogue insertion. 3. Lifetime instrinsics are ignored and use-after-scope is not implemented. This would be harder to do than in ASan, because we need to use a differently tagged pointer depending on which lifetime.start / lifetime.end the current instruction is dominated / post-dominated. Reviewers: kcc, alekseyshl Subscribers: srhines, kubamracek, javed.absar, hiraditya, llvm-commits Differential Revision: https://reviews.llvm.org/D41602 llvm-svn: 322324
* [InstSimplify] add tests for implied cmp with zero (PR35790); NFCSanjay Patel2018-01-111-0/+142
| | | | llvm-svn: 322323
* PeepholeOptimizer: Fix for vregs without defsMatthias Braun2018-01-115-10/+74
| | | | | | | | | | The PeepholeOptimizer would fail for vregs without a definition. If this was caused by an undef operand abort to keep the code simple (so we don't need to add logic everywhere to replicate the undef flag). Differential Revision: https://reviews.llvm.org/D40763 llvm-svn: 322319
* Make internal/private GVs implicitly dso_local.Rafael Espindola2018-01-1139-102/+122
| | | | | | | | | | | | | | | | While updating clang tests for having clang set dso_local I noticed that: - There are *a lot* of tests to update. - Many of the updates are redundant. They are redundant because a GV is "obviously dso_local". This patch starts formalizing that a bit by requiring that internal and private GVs be dso_local too. Since they all are, we don't have to print dso_local to the textual representation, making it a bit more compact and easier to read. llvm-svn: 322317
* Tighten up DIFile verifier for checksumsPaul Robinson2018-01-113-5/+51
| | | | | | Differential Revision: https://reviews.llvm.org/D41965 llvm-svn: 322314
* PeepholeOptimizer: Do not form PHI with subreg argumentsMatthias Braun2018-01-112-22/+86
| | | | | | | | | | | | | | | | | | | | | When replacing a PHI the PeepholeOptimizer currently takes the register class of the register at the first operand. This however is not correct if this argument has a subregister index. As there is currently no API to query the register class resulting from applying a subregister index to all registers in a class, we can only abort in these cases and not perform the transformation. This changes findNextSource() to require the end of all copy chains to not use a subregister if there is any PHI in the chain. I had to rewrite the overly complicated inner loop there to have a good place to insert the new check. This fixes https://llvm.org/PR33071 (aka rdar://32262041) Differential Revision: https://reviews.llvm.org/D40758 llvm-svn: 322313
* [arm] Implement Target Operand Flag MIR serialization.Evgeniy Stepanov2018-01-113-2/+37
| | | | | | | | | | Reviewers: efriedma, pcc Subscribers: aemerson, javed.absar, kristof.beyls, hiraditya, llvm-commits Differential Revision: https://reviews.llvm.org/D39975 llvm-svn: 322312
* [Sink] Really really fix predicate in legality checkFiona Glaser2018-01-112-3/+11
| | | | | | | | | | | LoadInst isn't enough; we need to include intrinsics that perform loads too. All side-effecting intrinsics and such are already covered by the isSafe check, so we just need to care about things that read from memory. D41960, originally from D33179. llvm-svn: 322311
* [WebAssemlby] MC: Don't write COMDAT symbols as global importsSam Clegg2018-01-114-4/+45
| | | | | | | | This was causing undefined references at link time in lld. Differential Revision: https://reviews.llvm.org/D41959 llvm-svn: 322309
* [X86] Legalize 128/256 gathers/scatters on KNL by using widening rather than ↵Craig Topper2018-01-112-164/+120
| | | | | | | | sign extending the index. We can just widen the vectors with undef and zero extend the mask. llvm-svn: 322308
* [WebAssemly] Rename and improve formatting for ctor/dtor testSam Clegg2018-01-111-3/+8
| | | | llvm-svn: 322307
* Use size_t to represent the size of a StringMapEntry length and alignment ↵Aaron Ballman2018-01-112-11/+49
| | | | | | | | rather than unsigned. Patch by Matt Davis. llvm-svn: 322305
* dag-combine: Transfer debug information when folding (zext (truncate x))Adrian Prantl2018-01-112-1/+50
| | | | | | | | | | | -> (zext (truncate x)) This patch adds debug info support to the dagcombine rule (zext (truncate x)) -> (zext (truncate x)). Differential Revision: https://reviews.llvm.org/D41924 llvm-svn: 322304
* [Hexagon] Fix building 64-bit vector from constant valuesKrzysztof Parzyszek2018-01-112-1/+9
| | | | | | The constants were aggregated in a reverse order. llvm-svn: 322303
* [Hexagon] Cast elements to correct type when creating constant vectorKrzysztof Parzyszek2018-01-112-1/+14
| | | | llvm-svn: 322301
* DAGCombine: Let truncates negate extension through extract-subvectorZvi Rackover2018-01-112-66/+37
| | | | | | | | | | | | | | | | | | | | | | Summary: Fold cases such as: (v8i8 truncate (v8i32 extract_subvector (v16i32 sext (v16i8 V), Idx))) -> (v8i8 extract_subvector (v16i8 V), Idx) This can be generalized to cases where the truncate and extend do not fully cancel each other out, but it may require querying the target about profitability. Reviewers: RKSimon, craig.topper, spatel, efriedma Reviewed By: RKSimon Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D41927 llvm-svn: 322300
* [Hexagon] Impose limits on container sizes in HexagonGenInsertKrzysztof Parzyszek2018-01-111-3/+20
| | | | | | | With over 300k virtual registers, the size of the data exceeded 12GB. Impose limits on how much information is collected. llvm-svn: 322299
* [Hexagon] Use SetVector when queuing nodes to scan in selectVectorConstantsKrzysztof Parzyszek2018-01-111-3/+4
| | | | llvm-svn: 322298
* X86 Tests: Add zext cases in (trunc (subvector)) test. NFCZvi Rackover2018-01-111-0/+138
| | | | | | Cases were missing as observed in D41927 llvm-svn: 322297
* X86: Refactor type-splitting to target-legal size vector to a helper functionZvi Rackover2018-01-111-32/+58
| | | | | | | | | | | | | | Summary: This is a preparatory step for D41811: refactoring code for breaking vector operands of binary operation to legal-types. Reviewers: RKSimon, craig.topper, spatel Reviewed By: RKSimon Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D41925 llvm-svn: 322296
* [X86][SSE] Drop old insertps stack folding testSimon Pilgrim2018-01-111-14/+0
| | | | | | Broken test from old attempt for folding tables - we don't peek through extract_subvector spills at all (which is why it doesn't fold), and we already have foldMemoryOperandCustom to handle insertps immediate correction anyway. llvm-svn: 322292
* [AArch64] Remove Unsupported = 1 flag for the WriteAtomic WriteRes.Joel Jones2018-01-111-1/+1
| | | | | | | | | | | | | In practice, this patch has no effect on scheduling. There is no test case as there already exists a comprehensive test case for LSE Atomics. Patch by Stefan Teleman Differential Revision: https://reviews.llvm.org/D40694 llvm-svn: 322291
* [docs] Update Phabricator docs about setting repository for diffs uploaded ↵Ben Hamilton2018-01-111-5/+5
| | | | | | | | | | | | | | | | via web Summary: Docs are out of date now that we have separate repositories for LLVM, Clang, etc. Reviewers: asb Reviewed By: asb Differential Revision: https://reviews.llvm.org/D41919 llvm-svn: 322290
* [NFC] Abstract out source argument index in MemTransferInst.Daniel Neilson2018-01-111-4/+7
| | | | | | | | Summary: References to the source operand within class MemTransferInst are currently by a constant 1. Abstract this out into a named constant. llvm-svn: 322289
OpenPOWER on IntegriCloud