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* Remove type casts that are no longer neededChris Lattner2005-12-112-6/+7
| | | | llvm-svn: 24661
* Realize the constant pool & global addrs must always be ptr typeChris Lattner2005-12-111-5/+6
| | | | llvm-svn: 24660
* Fix the JIT failures from last night.Chris Lattner2005-12-111-1/+2
| | | | llvm-svn: 24659
* FP select improvements (and likely breakage), oh and crazy people might want ↵Andrew Lenharth2005-12-112-42/+46
| | | | | | to *return* floating point values. Don't see why myself llvm-svn: 24658
* Add support for TargetConstantPool nodes to the dag isel emitter, and useNate Begeman2005-12-106-30/+47
| | | | | | | them in the PPC backend, to simplify some logic out of Select and SelectAddr. llvm-svn: 24657
* Use SDTCisPtrTy type property for store address.Evan Cheng2005-12-101-2/+2
| | | | llvm-svn: 24656
* Stop emitting a redudant type check for complex pattern node.Evan Cheng2005-12-101-5/+0
| | | | llvm-svn: 24655
* * Added X86 store patterns.Evan Cheng2005-12-103-43/+24
| | | | | | * Added X86 dec patterns. llvm-svn: 24654
* Added new getNode and getTargetNode variants for X86 stores.Evan Cheng2005-12-102-60/+81
| | | | llvm-svn: 24653
* For instructions which produce no result, e.g. store, chain's Resno == 0.Evan Cheng2005-12-101-4/+6
| | | | llvm-svn: 24652
* Add support patterns to many load and store instructions which willNate Begeman2005-12-092-76/+133
| | | | | | hopefully use patterns in the near future. llvm-svn: 24651
* Add SDTCisPtrTy and use it for loads, to indicate that the operand of a loadChris Lattner2005-12-091-3/+5
| | | | | | | must be a pointer. This removes a type check out of the code generated by tblgen for load matching. llvm-svn: 24650
* Add a new SDTCisPtrTy constraint, which indicates that an operand must haveChris Lattner2005-12-092-2/+8
| | | | | | the same type as the pointer type for a target. llvm-svn: 24649
* Added patterns for ADD8rm, etc. These fold load operands. e.g. addb 4(%esp), %alEvan Cheng2005-12-092-3/+22
| | | | llvm-svn: 24648
* * Do not allow nodes which produce chain results (e.g. loads) to be folded ifEvan Cheng2005-12-092-420/+414
| | | | | | | | | it has more than one real use (non-chain uses). * Record folded chain producing node in CodeGenMap. * Do not fold a chain producing node if it has already been selected as an operand of a chain use. llvm-svn: 24647
* Avoid emitting two tabs when switching to a named sectionChris Lattner2005-12-091-2/+2
| | | | llvm-svn: 24646
* Teach the PPC backend about the ctor and dtor list when not using __main andChris Lattner2005-12-091-0/+34
| | | | | | linking the entire program into one bc file. llvm-svn: 24645
* Teach legalize how to promote sext_inreg to fix a problem Andrew pointedChris Lattner2005-12-091-0/+5
| | | | | | out to me. llvm-svn: 24644
* Prevent folding of instructions which produce chains that have more than 1 ↵Evan Cheng2005-12-092-4/+9
| | | | | | real use llvm-svn: 24643
* * Make sure complex pattern operands are selected first since their selectEvan Cheng2005-12-092-66/+83
| | | | | | | functions can return false and causing the instruction pattern match to fail. * Code clean up. llvm-svn: 24642
* it helps if your conditionals are not reversedAndrew Lenharth2005-12-091-9/+9
| | | | llvm-svn: 24641
* improve code insertion in two ways:Chris Lattner2005-12-081-20/+26
| | | | | | | | | | | | | 1. Only forward subst offsets into loads and stores, not into arbitrary things, where it will likely become a load. 2. If the source is a cast from pointer, forward subst the cast as well, allowing us to fold the cast away (improving cases when the cast is from an alloca or global). This hasn't been fully tested, but does appear to further reduce register pressure and improve code. Lets let the testers grind on it a bit. :) llvm-svn: 24640
* Add another important case we missChris Lattner2005-12-081-0/+19
| | | | llvm-svn: 24639
* Added support for ComplexPattern.Evan Cheng2005-12-081-0/+21
| | | | llvm-svn: 24638
* Added explicit type field to ComplexPattern.Evan Cheng2005-12-081-2/+2
| | | | llvm-svn: 24637
* * Added an explicit type field to ComplexPattern.Evan Cheng2005-12-083-9/+12
| | | | | | * Renamed MatchingNodes to RootNodes. llvm-svn: 24636
* * Added intelligence to X86 LEA addressing mode matching routine so it returnsEvan Cheng2005-12-082-84/+103
| | | | | | | false if the match is not profitable. e.g. leal 1(%eax), %eax. * Added patterns for X86 integer loads and LEA32. llvm-svn: 24635
* Added support for ComplexPattern. These are patterns that require C++ patternEvan Cheng2005-12-085-57/+220
| | | | | | | matching code that is not currently auto-generated by tblgen, e.g. X86 addressing mode. Selection routines for complex patterns can return multiple operands, e.g. X86 addressing mode returns 4. llvm-svn: 24634
* Fix a crash where ConstantVec nodes were being generated with the wrongNate Begeman2005-12-072-2/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | type when the target did not support them. Also teach Legalize how to expand ConstantVecs. This allows us to generate _test: lwz r2, 12(r3) lwz r4, 8(r3) lwz r5, 4(r3) lwz r6, 0(r3) addi r2, r2, 4 addi r4, r4, 3 addi r5, r5, 2 addi r6, r6, 1 stw r2, 12(r3) stw r4, 8(r3) stw r5, 4(r3) stw r6, 0(r3) blr For: void %test(%v4i *%P) { %T = load %v4i* %P %S = add %v4i %T, <int 1, int 2, int 3, int 4> store %v4i %S, %v4i * %P ret void } On PowerPC. llvm-svn: 24633
* Only transform (sext (truncate x)) -> (sextinreg x) if before legalize orChris Lattner2005-12-071-1/+3
| | | | | | if the target supports the resultant sextinreg llvm-svn: 24632
* X86 doesn't support sextinreg for 8-bit things either.Chris Lattner2005-12-071-0/+1
| | | | llvm-svn: 24631
* Teach the dag combiner to turn a truncate/sign_extend pair into a sextinregChris Lattner2005-12-071-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | when the types match up. This allows the X86 backend to compile: sbyte %toggle_value(sbyte* %tmp.1) { %tmp.2 = load sbyte* %tmp.1 ret sbyte %tmp.2 } to this: _toggle_value: mov %EAX, DWORD PTR [%ESP + 4] movsx %EAX, BYTE PTR [%EAX] ret instead of this: _toggle_value: mov %EAX, DWORD PTR [%ESP + 4] movsx %EAX, BYTE PTR [%EAX] movsx %EAX, %AL ret noticed in Shootout/objinst. -Chris llvm-svn: 24630
* Remove a now-dead map, patch by Saem Ghani, thanks!Chris Lattner2005-12-071-2/+1
| | | | llvm-svn: 24629
* fix divide and remainderAndrew Lenharth2005-12-062-13/+14
| | | | llvm-svn: 24628
* Silence another annoying GCC warningChris Lattner2005-12-061-1/+1
| | | | llvm-svn: 24627
* This solves the problem of the CBE renaming symbols that start with . but ↵Andrew Lenharth2005-12-061-0/+2
| | | | | | the assembly side still trying to reference them by their old names. Should be safe untill we hit a language front end that lets you specify such a name. llvm-svn: 24626
* more decent branches for FP. I might have to make some intermediate nodes ↵Andrew Lenharth2005-12-061-2/+33
| | | | | | to actually be able to use the DAG for FPcmp llvm-svn: 24625
* OK, this does wonders for broken stuffAndrew Lenharth2005-12-061-0/+1
| | | | llvm-svn: 24624
* Added comment for removing assertSumant Kowshik2005-12-061-0/+3
| | | | llvm-svn: 24623
* Collapsing node if variable length struct with final field of length zeroSumant Kowshik2005-12-061-1/+18
| | | | llvm-svn: 24621
* Handling of zero length last fields in struct used for growing it arbitrarilySumant Kowshik2005-12-061-1/+2
| | | | llvm-svn: 24620
* Fix test/Regression/Linker/2005-12-06-AppendingZeroLengthArrays.ll andChris Lattner2005-12-061-0/+2
| | | | | | | PR662. Thanks to Markus for providing me with a ton of files to reproduce the problem! llvm-svn: 24619
* new testcase for PR662Chris Lattner2005-12-061-0/+8
| | | | llvm-svn: 24618
* Implement external storage for post-order iteration, implementing PR267Chris Lattner2005-12-061-10/+84
| | | | | | Patch by Saem Ghani, thanks! llvm-svn: 24617
* Teach the SelectionDAG ISel how to turn ConstantPacked values intoNate Begeman2005-12-065-5/+66
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | constant nodes with vector types. Also teach the asm printer how to print ConstantPacked constant pool entries. This allows us to generate altivec code such as the following, which adds a vector constantto a packed float. LCPI1_0: <4 x float> < float 0.0e+0, float 0.0e+0, float 0.0e+0, float 1.0e+0 > .space 4 .space 4 .space 4 .long 1065353216 ; float 1 .text .align 4 .globl _foo _foo: lis r2, ha16(LCPI1_0) la r2, lo16(LCPI1_0)(r2) li r4, 0 lvx v0, r4, r2 lvx v1, r4, r3 vaddfp v0, v1, v0 stvx v0, r4, r3 blr For the llvm code: void %foo(<4 x float> * %a) { entry: %tmp1 = load <4 x float> * %a; %tmp2 = add <4 x float> %tmp1, < float 0.0, float 0.0, float 0.0, float 1.0 > store <4 x float> %tmp2, <4 x float> *%a ret void } llvm-svn: 24616
* Use new PPC-specific nodes to represent shifts which require the 6-bitChris Lattner2005-12-063-15/+40
| | | | | | | | | amount handling that PPC provides. These are generated by the lowering code and prevents the dag combiner from assuming (rightfully) that the shifts don't only look at 5 bits. This fixes a miscompilation of crafty with the new front-end. llvm-svn: 24615
* added instructions with inverted immediatesAndrew Lenharth2005-12-062-32/+23
| | | | llvm-svn: 24614
* yea, it helps to have your path set right when testingAndrew Lenharth2005-12-051-2/+4
| | | | llvm-svn: 24613
* These never trigger, but whateverAndrew Lenharth2005-12-052-9/+40
| | | | llvm-svn: 24612
* Remove unnecessary let hasCtrlDep=1 now it can be inferred.Evan Cheng2005-12-051-27/+25
| | | | llvm-svn: 24611
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