| Commit message (Collapse) | Author | Age | Files | Lines |
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This fixes PR10463. A two-address instruction with an <undef> use
operand was incorrectly rewritten so the def and use no longer used the
same register, violating the tie constraint.
Fix this by always rewriting <undef> operands with the register a def
operand would use.
llvm-svn: 135885
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llvm-svn: 135867
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llvm-svn: 135866
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llvm-svn: 135861
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Frits for straightening me out.
llvm-svn: 135856
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This method computes the edge bundles that should be live when splitting
around a compact region. This is independent of interference.
The function returns false if the live range was already a compact
region, or the compact region doesn't have any live bundles - it would
be the same as splitting around basic blocks.
Compact regions are computed using the normal spill placement code. We
pretend there is interference in all live-through blocks that don't use
the live range. This removes all edges from the Hopfield network used
for spill placement, so it converges instantly.
llvm-svn: 135847
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If there is no interference and no last split point, we cannot
enterIntvBefore(Stop) - that function needs a real instruction.
Use enterIntvAtEnd instead for that very easy case.
This code doesn't currently run, it is needed by multi-way splitting.
llvm-svn: 135846
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A split candidate can have a null PhysReg which means that it doesn't
map to a real interference pattern. Instead, pretend that all through
blocks have interference.
This makes it possible to generate compact regions where the live range
doesn't go through blocks that don't use it. The live range will still
be live between directly connected blocks with uses.
Splitting around a compact region tends to produce a live range with a
high spill weight, so it may evict a less dense live range.
llvm-svn: 135845
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This method matches addLinks - All the listed blocks are considered to
have interference, so they add a negative bias to their bundles.
This could also be done by addConstraints, but that requires building a
separate BlockConstraint array.
llvm-svn: 135844
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They always report 'no interference'.
llvm-svn: 135843
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llvm-svn: 135842
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the end.
llvm-svn: 135841
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llvm-svn: 135838
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llvm-svn: 135837
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should be faster and smaller.
Goodbye static ctors and dtors!
llvm-svn: 135836
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access its data.
This makes TargetRegisterClass slightly slower. Next step will be making contains faster.
Eventually TargetRegisterClass will be killed entirely.
llvm-svn: 135835
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they belong.
llvm-svn: 135833
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llvm-svn: 135832
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llvm-svn: 135831
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removes its dependence on canonical induction variables.
llvm-svn: 135829
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llvm-svn: 135828
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llvm-svn: 135826
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llvm-svn: 135825
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The immediate is in the range 1-32, but is encoded as 0-31 in a 5-bit bitfield.
Update the representation such that we store the operand as 0-31, allowing us
to remove the encoder method and the special case handling in the disassembler.
Update the assembly parser and the instruction printer accordingly.
llvm-svn: 135823
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so that a declaration for objc_retain is created when needed if it doesn't
already exist. rdar://9825114.
llvm-svn: 135821
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llvm-svn: 135820
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llvm-svn: 135819
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llvm-svn: 135818
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Tests for SMULBB, SMLALBT, SMLALTB, SMLALTT, and SMULL. Fix parsing of SMULLS.
llvm-svn: 135817
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llvm-svn: 135816
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InitializeX86MCInstrInfo, etc. are combined into InitializeX86TargetMC.
llvm-svn: 135812
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llvm-svn: 135811
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Add tests for SMLSD, SMLSDX, SMLSLD, SMLSLDX, SMMLA, SMMLAR, SMMLS, SMMLSR,
SMMUL, SMMULR, SMUAD and SMUADX.
llvm-svn: 135810
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llvm-svn: 135809
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emitted, emit them next as CIE/FDEs.
llvm-svn: 135807
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llvm-svn: 135806
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llvm-svn: 135805
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llvm-svn: 135802
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load folding logic
llvm-svn: 135801
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llvm-svn: 135800
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sequential containers.
llvm-svn: 135799
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Tests for SMLAL, SMLALBB, SMLALBT, SMLALTB, SMLALTT, SMLALD, and SMLALDX
instructions.
llvm-svn: 135798
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Fix parsing of carry-setting variant SMLALS and add tests.
llvm-svn: 135797
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Fix encoding of destination register. Add tests.
llvm-svn: 135796
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llvm-svn: 135795
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llvm-svn: 135794
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too. Patch by Jeff Muizelaar.
llvm-svn: 135789
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of doing the RAUW calls for the overflow value itself. This makes
it more consistent with how the rest of LegalizeDAG works.
llvm-svn: 135788
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llvm-svn: 135787
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In "normal" code these only happen when disassembling data, so we
won't lose anything if we just drop them.
llvm-svn: 135786
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