summaryrefslogtreecommitdiffstats
path: root/llvm
Commit message (Collapse)AuthorAgeFilesLines
...
* Fix AVX512 vector sqrt assembly strings.Cameron McInally2014-02-192-4/+22
| | | | llvm-svn: 201681
* Disable override and final C++ keyword in gcc 4.6.Logan Chien2014-02-191-2/+4
| | | | | | | | | According to http://gcc.gnu.org/projects/cxx0x.html, override and final keyword was added in gcc 4.7. Thus, we should not use these keywords in gcc 4.6 even when __GXX_EXPERIMENTAL_CXX0X__ is available. llvm-svn: 201679
* Revert r201622 and r201608.Daniel Jasper2014-02-1931-344/+158
| | | | | | | This causes the LLVMgold plugin to segfault. More information on the replies to r201608. llvm-svn: 201669
* X86: move test requiring X86TargetLowering info into its own directoryTim Northover2014-02-192-0/+4
| | | | | | | If LLVM is built without X86 as a supported target then the test would mysteriously fail. llvm-svn: 201668
* Try addding datalayout in case that's what Hexagon doesn't like.Tim Northover2014-02-191-2/+5
| | | | | | | Just a wild stab in the dark really, but in the absence of any ability to reproduce the problem... llvm-svn: 201658
* X86 CodeGenPrep: sink shufflevectors before shiftsTim Northover2014-02-195-0/+203
| | | | | | | | | | | | | | | | | On x86, shifting a vector by a scalar is significantly cheaper than shifting a vector by another fully general vector. Unfortunately, because SelectionDAG operates on just one basic block at a time, the shufflevector instruction that reveals whether the right-hand side of a shift *is* really a scalar is often not visible to CodeGen when it's needed. This adds another handler to CodeGenPrepare, to sink any useful shufflevector instructions down to the basic block where they're used, predicated on a target hook (since on other architectures, doing so will often just introduce extra real work). rdar://problem/16063505 llvm-svn: 201655
* Build PIE binaries when cross-compiling to Android.Evgeniy Stepanov2014-02-191-1/+2
| | | | | | This change also removes CMAKE_LINK_FLAGS setting that seems to be ignored by cmake. llvm-svn: 201654
* Try to revive buildbots after r201620Alexey Samsonov2014-02-191-1/+2
| | | | llvm-svn: 201651
* Remove special FP opcode maps and instead add enough MRM_XX formats to ↵Craig Topper2014-02-197-225/+207
| | | | | | handle all the FP operations. This increases format by 1 bit, but decreases opcode map by 1 bit so the TSFlags size doesn't change. llvm-svn: 201649
* Reduce size of map field in X86 TSFlags since it now requires less bits.Craig Topper2014-02-192-28/+28
| | | | llvm-svn: 201646
* Put some of the X86 formats in a more logical order.Craig Topper2014-02-193-56/+56
| | | | llvm-svn: 201645
* Remove A6/A7 opcode maps. They can all be handled with a TB map, opcode of ↵Craig Topper2014-02-1911-120/+122
| | | | | | 0xa6/0xa7, and adding MRM_C0/MRM_E0 forms. Removes 376K from the disassembler tables. llvm-svn: 201641
* llvm-objdump/COFF: Print load configuration table.Rui Ueyama2014-02-194-4/+116
| | | | | | | | | | | | Load Configuration Table may contain a pointer to SEH table. This patch is to print the offset to the table. Printing SEH table contents is a TODO. The layout of Layout Configuration Table is described in Microsoft PE/COFF Object File Format Spec, but the table's offset/size descriptions seems to be totally wrong, at least in revision 8.3 of the spec. I believe the table in this patch is the correct one. llvm-svn: 201638
* Fix a typo in a comment.Mingjie Xing2014-02-191-2/+2
| | | | llvm-svn: 201633
* MCAsmParser: support required parametersSaleem Abdulrasool2014-02-193-12/+139
| | | | | | | | | | | This enhances the macro parser to parse and handle parameter qualifications, which is needed to support required formal parameters in macro definitions. A required parameter may not be defaulted (though providing a default value is accepted with a warning). This improves GAS compatibility. Partially addresses PR9248. llvm-svn: 201630
* MCAsmParser: change representation of MCAsmMacroParameterSaleem Abdulrasool2014-02-191-18/+22
| | | | | | | | | | Rather than using std::pair, create a structure to represent the type. This is a preliminary refactoring to enable required parameter handling. Additional state is needed to indicate required parameters. This has a minor side effect of improving readability by providing more accurate names compared to first and second. llvm-svn: 201629
* Now that llvm always does the right thing with private, use it.Rafael Espindola2014-02-192-11/+6
| | | | llvm-svn: 201625
* Use PrivateLinkage now that it is safe.Rafael Espindola2014-02-191-2/+2
| | | | | | | Now that llvm's codegen knows to use an 'l' prefix when needed, we can just use PrivateLinkage. llvm-svn: 201624
* Avoid an infinite cycle with private linkage and -f{data|function}-sections.Rafael Espindola2014-02-194-6/+15
| | | | | | | | | | When outputting an object we check its section to find its name, but when looking for the section with -ffunction-section we look for the symbol name. Break the loop by requesting a name with the private prefix when constructing the section name. This matches the behavior before r201608. llvm-svn: 201622
* [docs] Clean up some more llvm-gcc stuffSean Silva2014-02-198-18/+14
| | | | | | | | | | Some references to llvm-gcc were so crusty that I wasn't sure how to proceed and so I've left them intact. I also slipped in a quick peephole fix to use a :doc: link instead of raw HTML link. llvm-svn: 201619
* [docs] Nuke some references to llvm-gccSean Silva2014-02-181-9/+9
| | | | | | | From a cursory look it seems like all the described commandline options and such apply to clang just fine, but I'd appreciate a second opinion. llvm-svn: 201616
* Fix PR18743.Rafael Espindola2014-02-1830-156/+333
| | | | | | | | | | | | | | | | | | | | | | | | The IR @foo = private constant i32 42 is valid, but before this patch we would produce an invalid MachO from it. It was invalid because it would use an L label in a section where the liker needs the labels in order to atomize it. One way of fixing it would be to just reject this IR in the backend, but that would not be very front end friendly. What this patch does is use an 'l' prefix in sections that we know the linker requires symbols for atomizing them. This allows frontends to just use private and not worry about which sections they go to or how the linker handles them. One small issue with this strategy is that now a symbol name depends on the section, which is not available before codegen. This is not a problem in practice. The reason is that it only happens with private linkage, which will be ignored by the non codegen users (llvm-nm and llvm-ar). llvm-svn: 201608
* Rename a DebugLoc variable to DbgLoc and a DataLayout to DL.Rafael Espindola2014-02-186-360/+389
| | | | | | This is quiet a bit less confusing now that TargetData was renamed DataLayout. llvm-svn: 201606
* Consistently check 'IsCode' when allocating sections in RuntimeDyld (viaLang Hames2014-02-182-2/+6
| | | | | | | | | | | | | | findOrEmitSection). Vaidas Gasiunas's patch, r201259, fixed one instance where we were always allocating sections as text. This patch fixes the remaining buggy call sites. No test case: This isn't breaking anything that I know of, it's just inconsistent. <rdar://problem/15943542> llvm-svn: 201605
* [AArch64] Expanded sin, cos, pow with FP vector types inputsAna Pazos2014-02-182-0/+106
| | | | llvm-svn: 201601
* [mips] Add support for ELF64-mips and the R_MIPS_32/R_MIPS_64 relocs for it.Daniel Sanders2014-02-182-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | Summary: This fixes several test failures when building LLVM on a MIPS host. The failures were: LLVM :: DebugInfo/enum.ll LLVM :: DebugInfo/inlined-arguments.ll LLVM :: DebugInfo/member-order.ll LLVM :: DebugInfo/namespace.ll LLVM :: DebugInfo/template-recursive-void.ll LLVM :: DebugInfo/tu-composite.ll LLVM :: DebugInfo/two-cus-from-same-file.ll LLVM :: Linker/type-unique-simple-a.ll LLVM :: Linker/type-unique-simple2.ll Reviewers: jacksprat, matheusalmeida Reviewed By: matheusalmeida Differential Revision: http://llvm-reviews.chandlerc.com/D2721 llvm-svn: 201582
* Rename some member variables from TD to DL.Rafael Espindola2014-02-1829-145/+145
| | | | | | TargetData was renamed DataLayout back in r165242. llvm-svn: 201581
* Add myself as owner for libc++Marshall Clow2014-02-181-0/+4
| | | | llvm-svn: 201573
* XCore target: Handle common linkageRobert Lytton2014-02-183-7/+22
| | | | llvm-svn: 201563
* XCore target: addMemOperand as necessaryRobert Lytton2014-02-183-49/+109
| | | | | | | | | BuildMI instructions were not including MachineMemOperand information. This was discovered by 'SingleSource/Benchmarks/Stanford/Oscar' failing due to a FrameIndex load incorrectly being hoisted by postra-machine-licm. No other tests have been found to fail. llvm-svn: 201562
* XCore target: Fix llvm.eh.return and EH info register handlingRobert Lytton2014-02-185-120/+330
| | | | llvm-svn: 201561
* Darwin builds: handle different possible form for SDKROOT.Tim Northover2014-02-181-4/+6
| | | | | | | | | Modifying build_llvm to handle SDKROOT being the name of an SDK rather than a path. This will still work if SDKROOT is a path. rdar://problem/15162322 llvm-svn: 201560
* GlobalMerge: move "-global-merge" option to the pass itself.Tim Northover2014-02-182-6/+9
| | | | | | | It's rather odd to have the flag enabling and disabling this pass only affect a single target. llvm-svn: 201559
* X86: use vpsllvd (& friends) for 16-bit shifts on HaswellTim Northover2014-02-182-0/+47
| | | | llvm-svn: 201558
* llvm-cov: Support gcov's extermely lenient treatment of -oJustin Bogner2014-02-182-4/+24
| | | | | | | | | | | | In gcov, the -o flag can accept either a directory or a file name. When given a directory, the gcda and gcno files are expected to be in that directory. When given a file, the gcda and gcno files are expected to be named based on the stem of that file. Non-existent paths are treated as files. This implements compatible behaviour. llvm-svn: 201555
* Add PS prefix to some classes I missed in r201538.Craig Topper2014-02-181-2/+2
| | | | llvm-svn: 201551
* Add a bunch of OpSize32 tags to 64-bit mode only instructions to match their ↵Craig Topper2014-02-184-28/+31
| | | | | | 32-bit mode counterparts for cases where there is also a OpSize16 instruction. llvm-svn: 201550
* AVX-512: Fixed size of mask registersElena Demikhovsky2014-02-181-4/+6
| | | | llvm-svn: 201546
* Fix a typo about lowering AArch64 va_copy.Jiangning Liu2014-02-182-15/+10
| | | | llvm-svn: 201541
* Add an x86 prefix encoding for instructions that would decode to a different ↵Craig Topper2014-02-189-185/+213
| | | | | | instruction with 0xf2/f3/66 were in front of them, but don't themselves have a prefix. For now this doesn't change any bbehavior, but plan to use it to fix some bugs in the disassembler. llvm-svn: 201538
* PGO: llvm-profdata: tool for merging profilesDuncan P. N. Exon Smith2014-02-1726-2/+353
| | | | | | | | | | | | | | | | | | | Introducing llvm-profdata, a tool for merging profile data generated by PGO instrumentation in clang. - The name indicates a file extension of <name>.profdata. Eventually profile data output by clang should be changed to that extension. - llvm-profdata merges two profiles. However, the name is more general, since it will likely pick up more tasks (such as summarizing a single profile). - llvm-profdata parses the current text-based format, but will be updated once we settle on a binary format. <rdar://problem/15949645> llvm-svn: 201535
* Fix the arm assembler so that this malformed instruction:Kevin Enderby2014-02-172-1/+7
| | | | | | | | | | | | | | | | | | ldrd r6, r7 [r2, #15] simply gives an error and does not triggers an assertion. As Jim points out, the diagnostic is really strange here, but fixing that would be more complicated. The missing comma results in the parser expecting a construct like r2[2], which is the vector index thing the error message is talking about. That's not what the user intended, though, and there's nothing else in the instruction that looks at all like a vector. Yet more fallout from not having a real parser here and trying to do context-free generic matching for addressing modes. rdar://15097243 llvm-svn: 201531
* Add support for assigning to . in AsmParser.Anders Waldenborg2014-02-176-12/+81
| | | | | | | | | This is implemented by handling assignments to the '.' pseudo symbol as ".org" directives. Differential Revision: http://llvm-reviews.chandlerc.com/D2625 llvm-svn: 201530
* Fix diassembler handling of rex.b when mod=00/01/10 and bbb=101. Mod=00 ↵Craig Topper2014-02-172-4/+27
| | | | | | should ignore the base register entirely. Mod=01/10 should treat this as R13 plus displacment. Fixes PR18860. llvm-svn: 201507
* AVX-512: implemented zext fron i1 to i16Elena Demikhovsky2014-02-172-1/+39
| | | | llvm-svn: 201502
* fix for null VectorizedValue assertion in the SLP Vectorizer (in function ↵Gerolf Hoflehner2014-02-172-2/+69
| | | | | | vectorizeTree()). radar://16064178 llvm-svn: 201501
* MCAsmParser: add some mixed argument testsSaleem Abdulrasool2014-02-171-0/+30
| | | | | | | Add some tests to explicitly validate handling of comma and non-comma separated arguments. llvm-svn: 201500
* MCAsmParser: better handling for named argumentsSaleem Abdulrasool2014-02-174-16/+132
| | | | | | | | | | | | | | | | | | | Until this point only macro definition with named parameters were parsed but the names were ignored. This adds support for using that information for named parameter instantiation. In order to support the full semantics of the keyword arguments, the arguments are no longer lazily initialised since the keyword arguments can be specified out of order and partially if they are defaulted. Prepopulate the arguments with the default value for any defaulted parameters, and then parse the specified arguments. This simplies some of the handling of the arguments in the inner loop since empty arguments simply increment the parameter index and move on. Note that keyword and positional arguments cannot be mixed. llvm-svn: 201499
* Use 16 byte stack alignment for NaCl on ARMMark Seaborn2014-02-164-6/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | NaCl's ARM ABI uses 16 byte stack alignment, so set that in ARMSubtarget.cpp. Using 16 byte alignment exposes an issue in code generation in which a varargs function leaves a 4 byte gap between the values of r1-r3 saved to the stack and the following arguments that were passed on the stack. (Previously, this code only needed to support 4 byte and 8 byte alignment.) With this issue, llc generated: varargs_func: sub sp, sp, #16 push {lr} sub sp, sp, #12 add r0, sp, #16 // Should be 20 stm r0, {r1, r2, r3} ldr r0, .LCPI0_0 // Address of va_list add r1, sp, #16 str r1, [r0] bl external_func Fix the bug by checking for "Align > 4". Also simplify the code by using OffsetToAlignment(), and update comments. Differential Revision: http://llvm-reviews.chandlerc.com/D2677 llvm-svn: 201497
* SCEVExpander: Try hard not to create derived induction variables in other loopsArnold Schwaighofer2014-02-163-26/+189
| | | | | | | | | | | | | | | | | | | During LSR of one loop we can run into a situation where we have to expand the start of a recurrence of a loop induction variable in this loop. This start value is a value derived of the induction variable of a preceeding loop. SCEV has cannonicalized this value to a different recurrence than the recurrence of the preceeding loop's induction variable (the type and/or step direction) has changed). When we come to instantiate this SCEV we created a second induction variable in this preceeding loop. This patch tries to base such derived induction variables of the preceeding loop's induction variable. This helps twolf on arm and seems to help scimark2 on x86. Reapply with a fix for the case of a value derived from a pointer. radar://15970709 llvm-svn: 201496
OpenPOWER on IntegriCloud