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* Update CMakeLists.txtDevang Patel2011-04-011-1/+1
| | | | | | Patch by arrowdoger. llvm-svn: 128719
* Add code for analyzing FP branches. Clean up branch Analysis functions.Akira Hatanaka2011-04-014-225/+186
| | | | llvm-svn: 128718
* Initialize HasVMLxForwarding.Benjamin Kramer2011-04-011-0/+1
| | | | llvm-svn: 128709
* Various Instructions' resizeOperands() methods are only used to grow theJay Foad2011-04-012-58/+20
| | | | | | list of operands. Simplify and rename them accordingly. llvm-svn: 128708
* Add test case.Evan Cheng2011-04-011-0/+27
| | | | llvm-svn: 128707
* FileCheck'ify test.Evan Cheng2011-04-011-8/+8
| | | | llvm-svn: 128706
* While testing dragonegg I noticed that isCastable and getCastOpcodeDuncan Sands2011-04-012-4/+25
| | | | | | | | had gotten out of sync: isCastable didn't think it was possible to cast the x86_mmx type to anything, while it did think it possible to cast an i64 to x86_mmx. llvm-svn: 128705
* Add annotations to tablegen-generated processor itineraries, or replace them ↵Andrew Trick2011-04-012-16/+21
| | | | | | with something meaningful. I want to be able to read and debug the generated tables. llvm-svn: 128703
* whitespaceAndrew Trick2011-04-012-68/+68
| | | | llvm-svn: 128701
* Issue libcalls __udivmod*i4 / __divmod*i4 for div / rem pairs.Evan Cheng2011-04-014-19/+174
| | | | | | rdar://8911343 llvm-svn: 128696
* Remove unused variablesMatt Beaumont-Gay2011-04-011-3/+1
| | | | llvm-svn: 128692
* Fix Thumb and Thumb2 tests to be register allocator independent.Jakob Stoklund Olesen2011-03-315-23/+27
| | | | llvm-svn: 128690
* Apply again changes to support ARM memory asm parsing. I removedBruno Cardoso Lopes2011-03-3110-76/+363
| | | | | | | | | | | | | | all LDR/STR changes and left them to a future patch. Passing all checks now. - Implement asm parsing support for LDRT, LDRBT, STRT, STRBT and fix the encoding wherever is possible. - Add a new encoding bit to describe the index mode used and teach printAddrMode2Operand to check by the addressing mode which index mode to print. - Testcases llvm-svn: 128689
* The basic register allocator must also use the inline spiller.Jakob Stoklund Olesen2011-03-311-1/+1
| | | | | | | It is using a trivial rewriter that doesn't know how to insert spill code requested by the standard spiller. llvm-svn: 128688
* Provide a legal pointer register class when targeting thumb1.Jakob Stoklund Olesen2011-03-313-1/+8
| | | | | | The LocalStackSlotAllocation pass was creating illegal registers. llvm-svn: 128687
* Fix SystemZ testsJakob Stoklund Olesen2011-03-311-1/+2
| | | | llvm-svn: 128686
* Instcombile optimization: extractelement(cast) -> cast(extractelement)Nadav Rotem2011-03-312-1/+36
| | | | llvm-svn: 128683
* Fix ARM tests to be register allocator independent.Jakob Stoklund Olesen2011-03-3117-56/+83
| | | | llvm-svn: 128680
* InstCombine: APFloat can't perform arithmetic on PPC double doubles, don't ↵Benjamin Kramer2011-03-312-2/+13
| | | | | | | | even try. Thanks Eli! llvm-svn: 128676
* Add a test case for a malformed LDC/LDC2 instructions with PUDW = 0b0000, whichJohnny Chen2011-03-311-0/+11
| | | | | | amounts to an UNDEFINED instruction. llvm-svn: 128668
* Distribute (A + B) * C to (A * C) + (B * C) to make use of NEON multiplierEvan Cheng2011-03-314-4/+80
| | | | | | | | | | | accumulator forwarding: vadd d3, d0, d1 vmul d3, d3, d2 => vmul d3, d0, d2 vmla d3, d1, d2 llvm-svn: 128665
* Fix single word and unsigned byte data transfer instruction encodings so thatJohnny Chen2011-03-312-0/+6
| | | | | | | | Inst{4} = 0. rdar://problem/9213022 llvm-svn: 128662
* Fix Mips, Sparc, and XCore tests that were dependent on register allocation.Jakob Stoklund Olesen2011-03-316-49/+60
| | | | | | Add an extra run with -regalloc=basic to keep them honest. llvm-svn: 128654
* Added support for FP conditional move instructions and fixed bugs in ↵Akira Hatanaka2011-03-3113-288/+726
| | | | | | handling of FP comparisons. llvm-svn: 128650
* Pick better examples. "fpext float 3.1415 to double" won't parse because 3.1415Nick Lewycky2011-03-311-2/+2
| | | | | | | isn't an exact float. Also "fpext float 1.0 to float" is invalid IR because it's not performing an extension. llvm-svn: 128647
* Don't completely eliminate identity copies that also modify super register ↵Jakob Stoklund Olesen2011-03-312-6/+13
| | | | | | | | | liveness. Turn them into noop KILL instructions instead. This lets the scavenger know when super-registers are killed and defined. llvm-svn: 128645
* Add BLXi to the instruction table for disassembly purpose.Johnny Chen2011-03-313-2/+26
| | | | | | | | A8.6.23 BLX (immediate) rdar://problem/9212921 llvm-svn: 128644
* Allow kill flags on two-address instructions. They are harmless.Jakob Stoklund Olesen2011-03-311-6/+2
| | | | llvm-svn: 128643
* Mark all uses as <undef> when joining a copy.Jakob Stoklund Olesen2011-03-314-9/+21
| | | | | | | | | | | | This way, shrinkToUses() will ignore the instruction that is about to be deleted, and we avoid leaving invalid live ranges that SplitKit doesn't like. Fix a misunderstanding in MachineVerifier about <def,undef> operands. The <undef> flag is valid on def operands where it has the same meaning as <undef> on a use operand. It only applies to sub-register defines which also read the full register. llvm-svn: 128642
* Remove stray empty test file.Daniel Dunbar2011-03-311-0/+0
| | | | llvm-svn: 128640
* Remove dead code.Devang Patel2011-03-311-5/+1
| | | | llvm-svn: 128639
* Revert r128632 again, until I figure out what break the testsBruno Cardoso Lopes2011-03-3110-360/+87
| | | | llvm-svn: 128635
* Fix bug found by valgrind.Jakob Stoklund Olesen2011-03-311-1/+1
| | | | llvm-svn: 128634
* Add XCore intrinsics for initializing / starting / synchronizing threads.Richard Osborne2011-03-313-6/+123
| | | | llvm-svn: 128633
* Reapply r128585 without generating a lib depedency cycle. An updated log:Bruno Cardoso Lopes2011-03-3110-87/+360
| | | | | | | | | | | | | - Implement asm parsing support for LDRT, LDRBT, STRT, STRBT and {STR,LDC}{2}_{PRE,POST} fixing the encoding wherever is possible. - Move all instructions which use am2offset without a pattern to use addrmode2. - Add a new encoding bit to describe the index mode used and teach printAddrMode2Operand to check by the addressing mode which index mode to print. - Testcases llvm-svn: 128632
* Fix whitespace.Michael J. Spencer2011-03-313-24/+24
| | | | llvm-svn: 128631
* Switch FileRemover from PathV1 to V2.Michael J. Spencer2011-03-316-21/+30
| | | | llvm-svn: 128630
* lib/CodeGen/LiveIntervalAnalysis.cpp: [PR9590] Don't use ↵NAKAMURA Takumi2011-03-311-1/+3
| | | | | | | | | | std::pow(float,float) here. We don't expect the real "powf()" on some hosts (and powf() would be available on other hosts). For consistency, std::pow(double,double) may be called instead. Or, precision issue might attack us, to see unstable regalloc and stack coloring. llvm-svn: 128629
* InstCombine: Fix transform to use the swapped predicate.Benjamin Kramer2011-03-312-3/+3
| | | | | | Thanks Frits! llvm-svn: 128628
* InstCombine: fold fcmp (fneg x), (fneg y) -> fcmp x, yBenjamin Kramer2011-03-312-0/+14
| | | | llvm-svn: 128627
* InstCombine: fold fcmp pred (fneg x), C -> fcmp swap(pred) x, -CBenjamin Kramer2011-03-312-0/+16
| | | | llvm-svn: 128626
* InstCombine: Shrink "fcmp (fpext x), C" to "fcmp x, C" if C can be ↵Benjamin Kramer2011-03-312-0/+57
| | | | | | | | losslessly converted to the type of x. Fixes PR9592. llvm-svn: 128625
* InstCombine: fold fcmp (fpext x), (fpext y) -> fcmp x, y.Benjamin Kramer2011-03-312-0/+18
| | | | llvm-svn: 128624
* Will not compile without the spec!Duncan Sands2011-03-311-1/+1
| | | | llvm-svn: 128623
* Strip trailing whitespace.Duncan Sands2011-03-312-14/+14
| | | | llvm-svn: 128622
* Testcase for r128619 (PR9571).Bill Wendling2011-03-311-0/+15
| | | | llvm-svn: 128620
* Pick a conservative register class when creating a small live range for remat.Jakob Stoklund Olesen2011-03-312-1/+62
| | | | | | | | | | | | The rematerialized instruction may require a more constrained register class than the register being spilled. In the test case, the spilled register has been inflated to the DPR register class, but we are rematerializing a load of the ssub_0 sub-register which only exists for DPR_VFP2 registers. The register class is reinflated after spilling, so the conservative choice is only temporary. llvm-svn: 128610
* Revert "- Implement asm parsing support for LDRT, LDRBT, STRT, STRBT and"Matt Beaumont-Gay2011-03-318-319/+66
| | | | | | This revision introduced a dependency cycle, as nlewycky mentioned by email. llvm-svn: 128597
* Fix typo in generated HTML.Nick Lewycky2011-03-311-1/+1
| | | | llvm-svn: 128594
* Use intrinsics for Neon vmull operations. Radar 9208957.Bob Wilson2011-03-312-27/+17
| | | | llvm-svn: 128591
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