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llvm-svn: 254311
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llvm-svn: 254310
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llvm-svn: 254307
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This hasn't been doing anything since using relocations was added.
llvm-svn: 254304
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llvm-svn: 254302
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MFHI, MFLO, MTHI and MTLO instructions
Differential Revision: http://reviews.llvm.org/D14436
llvm-svn: 254297
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Value of offset operand for microMIPS BALC and BC instructions is currently shifted 2 bits, but it should be 1 bit.
Differential Revision: http://reviews.llvm.org/D14770
llvm-svn: 254296
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Differential Revision: http://reviews.llvm.org/D15069
llvm-svn: 254295
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valid-xfail.s is for instructions that should be valid in the given ISA but
incorrectly fail. MSA instructions are correct to fail since MSA is not enabled.
llvm-svn: 254293
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PRECRQ.QB.PH, PRECRQU_S.QB.PH and PRECRQ_RS.PH.W instructions
Differential Revision: http://reviews.llvm.org/D14605
llvm-svn: 254291
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build bot.
llvm-svn: 254280
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llvm-svn: 254279
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llvm-svn: 254278
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vector. This is reflected correctly in the intrinsics, but was not refelected in the isel patterns.
For the floating point types, this requires adding a bitcast to the index vector when its passed through to the output.
llvm-svn: 254277
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The lambda is more readable.
llvm-svn: 254276
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llvm-svn: 254275
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verify there are no others.
llvm-svn: 254274
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llvm-svn: 254273
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llvm-svn: 254272
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llvm-svn: 254271
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for its shuffle indices.
llvm-svn: 254269
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llvm-svn: 254268
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llvm-svn: 254267
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llvm-svn: 254266
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llvm-svn: 254265
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llvm-svn: 254264
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This one is enabled only under -ffast-math. There are cases where the
difference between the value computed and the correct value is huge
even for ffast-math, e.g. as Steven pointed out:
x = -1, y = -4
log(pow(-1), 4) = 0
4*log(-1) = NaN
I checked what GCC does and apparently they do the same optimization
(which result in the dramatic difference). Future work might try to
make this (slightly) less worse.
Differential Revision: http://reviews.llvm.org/D14400
llvm-svn: 254263
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This fixes buildbots in systems that std::to_string is not present. It
also tidies the output of the diagnostic to render doubles a bit better
(thanks Ben Kramer for help with string streams and format).
llvm-svn: 254261
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llvm-svn: 254260
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We could already recognise shuffle(FSUB, FADD) -> ADDSUB, this allow us to recognise shuffle(FADD, FSUB) -> ADDSUB by commuting the shuffle mask prior to matching.
llvm-svn: 254259
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When a comdat is discarded, any globals defined in it become undefined.
llvm-svn: 254258
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llvm-svn: 254257
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llvm-svn: 254256
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We just want to test what is copied, no the order.
llvm-svn: 254255
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llvm-svn: 254254
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Differential Revision: http://reviews.llvm.org/D14810
llvm-svn: 254248
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llvm-svn: 254246
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- Add const keyword
- fix code comments
- move forward decl to the common file
llvm-svn: 254244
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llvm-svn: 254243
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llvm-svn: 254242
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We were not handling the case where an entry must be dropped and the
destination module has no llvm.global_ctors.
llvm-svn: 254241
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Playing with mutateType in here was making getValueType and getType
incompatible.
llvm-svn: 254240
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llvm-svn: 254239
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memory read below.
Found by msan!
llvm-svn: 254238
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Tidied up triple and regenerate tests using update_llc_test_checks.py
llvm-svn: 254237
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This is the last step to enable profile runtime to share the same value prof
data format and reader/writer code with llvm host tools. The VP related
data structures are moved to a section in InstrProfData.inc enabled with macro
INSTR_PROF_VALUE_PROF_DATA, and common API implementations are enabled with
INSTR_PROF_COMMON_API_IMPL. There should be no functional change.
llvm-svn: 254235
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in the ARM ARM."
This reverts commit r254201 and r254202, as it broke test-suite,
self-hosting and sanitizer tests on ARM buildbots.
llvm-svn: 254234
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As discussed on D14909
llvm-svn: 254233
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Added FMADD/FMSUB/FNMADD/FNMSUB tests for all types
Added load folding tests for 512-bit vectors
NOTE: Many of the AVX512 FMA instructions don't yet commute/fold correctly
As discussed on D14909
llvm-svn: 254232
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Tidied up triple and regenerate tests using update_llc_test_checks.py
llvm-svn: 254231
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