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* Revert "ARM: Thumb2 LDRD/STRD supports independent input/output regs"Renato Golin2015-06-024-48/+30
| | | | | | | | | This reverts commit r238795, as it broke the Thumb2 self-hosting buildbot. Since self-hosting issues with Clang are hard to investigate, I'm taking the liberty to revert now, so we can investigate it offline. llvm-svn: 238821
* [AArch64] Add v8.1a atomic instructionsVladimir Sukharev2015-06-0210-5/+694
| | | | | | | | | | | | Patch by: Tom Coxon Reviewers: t.p.northover Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D8501 llvm-svn: 238818
* [mips] [IAS] Reformat mips-expansions.s. NFC.Toma Tabacu2015-06-021-33/+32
| | | | | | | | | | | | | | | | | | Summary: Make mips-expansions.s more readable by grouping the instructions with their respective CHECK's. This test is going to get a lot bigger soon and it will become essentially unreadable if the current formatting is kept. I've also made the comments more useful and accurate, and I've restricted the RUN lines to under 80 columns. Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10089 llvm-svn: 238817
* [mips] Test both %dtprel_hi and %dtprel_lo instead of testing %dtprel_hi twice.Daniel Sanders2015-06-021-3/+3
| | | | | | The second %dtprel_hi is used on an addiu so it looks like a copy/paste error. llvm-svn: 238815
* [mips] Expand tabs in test/MC/Mips/mips-relocations.sDaniel Sanders2015-06-021-11/+11
| | | | llvm-svn: 238814
* [mips] [IAS] Add support for the .set softfloat/hardfloat directives.Toma Tabacu2015-06-025-0/+74
| | | | | | | | | | | | | | Summary: These directives are used to set the current value of the SoftFloat feature. Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits, mpf Differential Revision: http://reviews.llvm.org/D9074 llvm-svn: 238813
* AVX-512: Implemented VFIXUPIMMSD and VFIXUPIMMSS instructions for KNLElena Demikhovsky2015-06-023-14/+230
| | | | | | | | | Implemented DAG lowering for all these forms. Added tests for encoding. By Igor Breger (igor.breger@intel.com) llvm-svn: 238811
* revert 238809Asaf Badouh2015-06-0210-589/+31
| | | | llvm-svn: 238810
* AVX-512: Implemented GETEXP instruction for KNL and SKXAsaf Badouh2015-06-0210-31/+589
| | | | | | | Added rounding mode modifier for SQRTPS/PD Added tests for encoding and intrinsics. llvm-svn: 238809
* [TableGen] Use range-based for loops. NFCCraig Topper2015-06-022-22/+20
| | | | llvm-svn: 238808
* Fix typo in comment. NFCCraig Topper2015-06-021-1/+1
| | | | llvm-svn: 238807
* [TableGen] Rename ListInit::getSize to just 'size' to be more consistent.Craig Topper2015-06-028-37/+36
| | | | llvm-svn: 238806
* [TableGen] Use range-based for loops. NFC.Craig Topper2015-06-024-33/+28
| | | | llvm-svn: 238805
* [RuntimeDydlELF] Use range-based loop.Davide Italiano2015-06-021-5/+3
| | | | | | | Differential Revision: http://reviews.llvm.org/D10165 Reviewed by: rafael llvm-svn: 238804
* Create a MCSymbolELF.Rafael Espindola2015-06-0218-56/+95
| | | | | | | | | This create a MCSymbolELF class and moves SymbolSize since only ELF needs a size expression. This reduces the size of MCSymbol from 56 to 48 bytes. llvm-svn: 238801
* MC: Tidy up LOH naming a bit. NFC.Jim Grosbach2015-06-013-9/+9
| | | | llvm-svn: 238800
* MC: Tidy up formatting a bit. NFC.Jim Grosbach2015-06-013-55/+54
| | | | llvm-svn: 238799
* [Support] Simplify Triple::getOSVersionDavid Majnemer2015-06-011-9/+1
| | | | | | | Those who are interested in the Android version can use getEnvironmentVersion instead of getOSVersion. llvm-svn: 238798
* [ADT] Add Triple::getEnvironmentVersionDavid Majnemer2015-06-012-16/+49
| | | | | | | | This allows us to extract version numbers from the environment. getOSVersion is currently overloaded for that purpose, this allows us to clean it up. llvm-svn: 238796
* ARM: Thumb2 LDRD/STRD supports independent input/output regsMatthias Braun2015-06-014-30/+48
| | | | | | | | | | | | | The existing code would unnecessarily break LDRD/STRD apart with non-adjacent registers, on thumb2 this is not necessary. Ideally on thumb2 we shouldn't match for ldrd/strd pre-regalloc anymore as there is not reason to set register hints anymore, changing that is something for a future patch however. Differential Revision: http://reviews.llvm.org/D9694 llvm-svn: 238795
* AArch64: Use CMP;CCMP sequences for and/or/setcc trees.Matthias Braun2015-06-015-72/+295
| | | | | | | | | | | | Previously CCMP/FCCMP instructions were only used by the AArch64ConditionalCompares pass for control flow. This patch uses them for SELECT like instructions as well by matching patterns in ISelLowering. PR20927, rdar://18326194 Differential Revision: http://reviews.llvm.org/D8232 llvm-svn: 238793
* [bpf] fix buildAlexei Starovoitov2015-06-011-2/+2
| | | | | | | | fix breakage due to r238634 Patch by Vijay Subramanian. llvm-svn: 238792
* Move the name pointer out of Value into a map that lives on theOwen Anderson2015-06-014-17/+50
| | | | | | | | | | | | | | | | LLVMContext. Production builds of clang do not set names on most Value's, so this is wasted space on almost all subclasses of Value. This reduces the size of all Value subclasses by 8 bytes on 64 bit hosts. The one tricky part of this change is averting compile time regression by keeping Value::hasName() fast. This required stealing bits out of NumOperands. With this change, peak memory usage on verify-uselistorder-nodbg.lto.bc is decreased by approximately 2.3% (~3MB absolute on my machine). llvm-svn: 238791
* [dsymutil] Remove extraneous std::move of local in return statement.Frederic Riss2015-06-011-1/+1
| | | | llvm-svn: 238790
* R600/SI: Don't hardcode pointer typeMatt Arsenault2015-06-011-4/+5
| | | | llvm-svn: 238789
* add missing dependency for ExecutionEngine libSanjay Patel2015-06-012-1/+2
| | | | | | | This appears to be masked most of the time, but the problem was exposed on some bots by r238051. llvm-svn: 238788
* LiveRangeEdit: Fix liveranges not shrinking on subrange kill.Matthias Braun2015-06-013-3/+77
| | | | | | | | | | | | | | If a dead instruction we may not only have a last-use in the main live range but also in a subregister range if subregisters are tracked. We need to partially rebuild live ranges in both cases. The testcase only broke when subregister liveness was enabled. I commited it in the current form because there is currently no flag to enable/disable subregister liveness. This fixes PR23720. llvm-svn: 238785
* ARMLoadStoreOptimizer: Fix doxygen comments; NFCMatthias Braun2015-06-011-34/+28
| | | | llvm-svn: 238784
* [dsymutil] Remove unnecessary ';'Frederic Riss2015-06-011-1/+1
| | | | llvm-svn: 238783
* [dsymutil] Use YAMLIO to dump debug map.Frederic Riss2015-06-014-55/+166
| | | | | | | | | | | Doing so will allow us to also accept a YAML debug map in input as using YAMLIO gives us the parsing for free. Being able to have textual debug maps will in turn allow much more control over the tests, because 1/ no need to check-in a binary containing the debug map and 2/ it will allow to use the same objects/IR files with made-up debug-maps to test different scenari. llvm-svn: 238781
* Make the C++ LTO API easier to use from C++ clients.Peter Collingbourne2015-06-014-37/+49
| | | | | | | | | | | Start using C++ types such as StringRef and MemoryBuffer in the C++ LTO API. In doing so, clarify the ownership of the native object file: the caller now owns it, not the LTOCodeGenerator. The C libLTO library has been modified to use a derived class of LTOCodeGenerator that owns the object file. Differential Revision: http://reviews.llvm.org/D10114 llvm-svn: 238776
* Revert "[Hexagon] Adding basic ELF relocation generation and testing ↵Rafael Espindola2015-06-015-449/+28
| | | | | | | | | | | | advanced relaxation codepath." This reverts commit r238748. It broke the msan bot: http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/4372/steps/check-llvm%20msan/logs/stdio llvm-svn: 238772
* lit: Allow configurations to restrict the set of tests to runArnold Schwaighofer2015-06-012-1/+14
| | | | | | | | | | By setting limit_to_features to a non empty list of features a configuration can restrict the set of tests to run to only include tests that require a feature in this list. rdar://21082253 llvm-svn: 238766
* Disable MachineSink on convergent operations, similar to how IR Sink isOwen Anderson2015-06-011-0/+4
| | | | | | | restricted. No test because no in-tree target currently has convergent MachineInstr's. llvm-svn: 238763
* Teach the IR Sink pass to (conservatively) respect convergent annotations.Owen Anderson2015-06-012-0/+30
| | | | llvm-svn: 238762
* [mips][FastISel] Implement bswap.Vasileios Kalintiris2015-06-012-0/+122
| | | | | | | | | | | | | | | | | | Summary: Implement bswap intrinsic for MIPS FastISel. It's very different for misp32 r1/r2 . Based on a patch by Reed Kotler. Test Plan: bswap1.ll test-suite Reviewers: dsanders, rkotler Subscribers: llvm-commits, rfuhler Differential Revision: http://reviews.llvm.org/D7219 llvm-svn: 238760
* [mips][FastISel] Implement intrinsics memset, memcopy & memmove.Vasileios Kalintiris2015-06-012-7/+163
| | | | | | | | | | | | | | | | | | | | Summary: Implement the intrinsics memset, memcopy and memmove in MIPS FastISel. Make some needed infrastructure fixes so that this can work. Based on a patch by Reed Kotler. Test Plan: memtest1.ll The patch passes test-suite for mips32 r1/r2 and at O0/O2 Reviewers: rkotler, dsanders Subscribers: llvm-commits, rfuhler Differential Revision: http://reviews.llvm.org/D7158 llvm-svn: 238759
* [mips][FastISel] Implement srem/urem and sdiv/udiv instructions.Vasileios Kalintiris2015-06-013-0/+172
| | | | | | | | | | | | | | | | | | | Summary: Implement the LLVM assembly urem/srem and sdiv/udiv instructions in MIPS FastISel. Based on a patch by Reed Kotler. Test Plan: srem1.ll div1.ll test-suite at O0/O2 for mips32 r1/r2 Reviewers: dsanders, rkotler Subscribers: llvm-commits, rfuhler Differential Revision: http://reviews.llvm.org/D7028 llvm-svn: 238757
* [mips][FastISel] Implement the select statement for MIPS FastISel.Vasileios Kalintiris2015-06-012-0/+138
| | | | | | | | | | | | | | | | | | Summary: Implement the LLVM IR select statement for MIPS FastISelsel. Based on a patch by Reed Kotler. Test Plan: "Make check" test included now. Passes test-suite at O2/O0 mips32 r1/r2. Reviewers: dsanders, rkotler Subscribers: llvm-commits, rfuhler Differential Revision: http://reviews.llvm.org/D6774 llvm-svn: 238756
* [mips][FastISel] Clobber HI0/LO0 registers in MUL instructions.Vasileios Kalintiris2015-06-012-0/+51
| | | | | | | | | | | | | | | | | | | | | Summary: The contents of the HI/LO registers are unpredictable after the execution of the MUL instruction. In addition to implicitly defining these registers in the MUL instruction definition, we have to mark those registers as dead too. Without this the fast register allocator is running out of registers when the MUL instruction is followed by another one that tries to allocate the AC0 register. Based on a patch by Reed Kotler. Reviewers: dsanders, rkotler Subscribers: llvm-commits, rfuhler Differential Revision: http://reviews.llvm.org/D9825 llvm-svn: 238755
* Drop remaining Dragonegg support in release scriptsHans Wennborg2015-06-012-13/+1
| | | | | | | | | | r236077 and r236081 dropped Dragonegg support from the release scripts but left some pieces. The most notable change is that Dragonegg won't be tagged any more. Patch by David Wiberg <dwiberg@gmail.com>. llvm-svn: 238753
* Fix relocation selection for foo-. on mips.Rafael Espindola2015-06-012-1/+11
| | | | | | This handles only the 32 bit case. llvm-svn: 238751
* Simplify code, NFC.Rafael Espindola2015-06-011-107/+60
| | | | llvm-svn: 238750
* Add isConstant argument to MDBuilder::createTBAAStructTagNodeArtur Pilipenko2015-06-012-5/+12
| | | | | | | | | | According to the TBAA description struct-path tag node can have an optional IsConstant field. Add corresponding argument to MDBuilder::createTBAAStructTagNode. Reviewed By: hfinkel Differential Revision: http://reviews.llvm.org/D10160 llvm-svn: 238749
* [Hexagon] Adding basic ELF relocation generation and testing advanced ↵Colin LeMahieu2015-06-015-28/+449
| | | | | | relaxation codepath. llvm-svn: 238748
* The fragment implies the section, don't store both.Rafael Espindola2015-06-016-36/+64
| | | | | | This reduces MCSymbol from 64 to 56 bytes on x86_64. llvm-svn: 238747
* First commit test.Asaf Badouh2015-06-011-0/+1
| | | | llvm-svn: 238745
* [CMake] Revert commits r238740/r238741 for embedding Windows version info.Greg Bedwell2015-06-012-171/+0
| | | | | | | The clang Windows bots are showing mysterious failures. Reverting until I can figure out what's going on. llvm-svn: 238744
* AVX-512: Optimized vector shuffle for v16f32 and v16i32 types.Elena Demikhovsky2015-06-013-43/+173
| | | | llvm-svn: 238743
* Removing commited assembly file.Luke Cheeseman2015-06-011-3/+0
| | | | llvm-svn: 238742
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