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* [RISCV] Implement branch analysisAlex Bradbury2018-01-107-159/+422
| | | | | | | | | This is a prerequisite for the branch relaxation pass, and allows a number of optimisation passes (e.g. BranchFolding and MachineBlockPlacement) to work. Differential Revision: https://reviews.llvm.org/D40808 llvm-svn: 322222
* [RISCV] Add support for llvm.{frameaddress,returnaddress} intrinsicsAlex Bradbury2018-01-103-0/+158
| | | | llvm-svn: 322218
* [RISCV] Add basic support for inline asm constraintsAlex Bradbury2018-01-105-0/+179
| | | | llvm-svn: 322217
* [RISCV] Support stack frames and offsets up to 32-bitsAlex Bradbury2018-01-106-11/+117
| | | | | | Differential Revision: https://reviews.llvm.org/D40807 llvm-svn: 322216
* [RISCV] Support for varargsAlex Bradbury2018-01-105-24/+718
| | | | | | | | | | | | Includes support for expanding va_copy. Also adds support for using 'aligned' registers when necessary for vararg calls, and ensure the frame pointer always points to the bottom of the vararg spill region. This is necessary to ensure that the saved return address and stack pointer are always available at fixed known offsets of the frame pointer. Differential Revision: https://reviews.llvm.org/D40805 llvm-svn: 322215
* Test commit accessScott Linder2018-01-101-2/+2
| | | | llvm-svn: 322213
* [SelectionDAG][X86] Explicitly store the scale in the gather/scatter ISD nodesCraig Topper2018-01-1010-42/+229
| | | | | | | | | | Currently we infer the scale at isel time by analyzing whether the base is a constant 0 or not. If it is we assume scale is 1, else we take it from the element size of the pass thru or stored value. This seems a little weird and I think it makes more sense to make it explicit in the DAG rather than doing tricky things in the backend. Most of this patch is just making sure we copy the scale around everywhere. Differential Revision: https://reviews.llvm.org/D40055 llvm-svn: 322210
* [MachineOutliner] Outline ADRPsJessica Paquette2018-01-102-0/+11
| | | | | | | | | ADRP instructions weren't being outlined because they're PC-relative and thus fail the LR checks. This patch adds a special case for ADRPs to getOutliningType to make sure that ADRPs can be outlined and updates the MIR test. llvm-svn: 322207
* [InstCombine] add test to show missed bswap; NFCSanjay Patel2018-01-101-11/+90
| | | | | | | | D41353 / D41233 are proposing to alter the shl/and canonicalization, but I think that would just move an existing pattern-matching hole to a different place. llvm-svn: 322206
* AArch64: Fix emergency spillslot being out of reach for large callframesMatthias Braun2018-01-1010-11/+75
| | | | | | | | | | | | | | | | | | | | | | | | | | | Large callframes (calls with several hundreds or thousands or parameters) could lead to situations in which the emergency spillslot is out of range to be addressed relative to the stack pointer. This commit forces the use of a frame pointer in the presence of large callframes. This commit does several things: - Compute max callframe size at the end of instruction selection. - Add mirFileLoaded target callback. Use it to compute the max callframe size after loading a .mir file when the size wasn't specified in the file. - Let TargetFrameLowering::hasFP() return true if there exists a callframe > 255 bytes. - Always place the emergency spillslot close to FP if we have a frame pointer. - Note that `useFPForScavengingIndex()` would previously return false when a base pointer was available leading to the emergency spillslot getting allocated late (that's the whole effect of this callback). Which made no sense to me so I took this case out: Even though the emergency spillslot is technically not referenced by FP in this case we still want it allocated early. Differential Revision: https://reviews.llvm.org/D40876 llvm-svn: 322200
* [MIR] Update MIRLangRef with documentation on bundled instructionsFrancis Visoiu Mistrih2018-01-101-1/+15
| | | | | | Differential Revision: https://reviews.llvm.org/D41872 llvm-svn: 322198
* [X86][MMX] Add test for PR35869Simon Pilgrim2018-01-101-0/+57
| | | | llvm-svn: 322197
* [X86][MMX] Pull out common MMX VT test. NFCI.Simon Pilgrim2018-01-101-28/+27
| | | | llvm-svn: 322195
* X86 Tests: Add isel tests for truncate-extract_vector-extend. NFC.Zvi Rackover2018-01-101-0/+160
| | | | | | To be improved in a future patch llvm-svn: 322192
* [AMDGPU][MC][GFX8][GFX9] Added XNACK_MASK supportDmitry Preobrazhensky2018-01-1011-6/+100
| | | | | | | | | See bug 35764: https://bugs.llvm.org/show_bug.cgi?id=35764 Differential Revision: https://reviews.llvm.org/D41614 Reviewers: vpykhtin, artem.tamazov, arsenm llvm-svn: 322189
* Fix -Wdocumentation warning by removing empty @brief. NFCISimon Pilgrim2018-01-101-1/+0
| | | | llvm-svn: 322186
* [X86][SSE] Add some basic FABS combine testsSimon Pilgrim2018-01-101-0/+141
| | | | llvm-svn: 322182
* Avoid inlining if there is byval arguments with non-alloca address spaceBjorn Pettersson2018-01-102-2/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: After teaching InlineCost more about address spaces () another fault was detected in the inliner. If an argument has the byval attribute the parameter might be copied to an alloca. That part seems to work fine even if the argument has a different address space than the alloca address space. However, if the address spaces differ, then the inlined function still might refer to the parameter using the original address space (the inliner does not handle that situation very well). This patch avoids the problem by simply disallowing inlining when there are byval arguments with address space that differs from the alloca address space. I'm not really sure how to transform the code if we want to get inlining for this situation. I assume that it never has been working, and that the fixes in r321809 just exposed an old problem. Fault found by skatkov (Serguei Katkov). It is mentioned in follow up comments to https://reviews.llvm.org/D40455. Reviewers: skatkov Reviewed By: skatkov Subscribers: uabelho, eraman, llvm-commits, haicheng Differential Revision: https://reviews.llvm.org/D41898 llvm-svn: 322181
* [X86][SSE] Add v2f64 u2 shuffle testSimon Pilgrim2018-01-101-1/+29
| | | | | | Adds missing coverage for SHUFPD undef argument lowering, and also shows a missed opportunity to remove a unnecessary move compared to 02 shuffle mask. llvm-svn: 322175
* [AArch64][SVE] Asm: Add support for (mov|dup) of scalarSander de Smalen2018-01-106-0/+187
| | | | | | | | | | | | | | Summary: This patch adds support for 'dup' (Scalar -> SVE) and its corresponding 'mov' alias. Reviewers: fhahn, rengolin, evandro, echristo Reviewed By: fhahn Subscribers: aemerson, javed.absar, tschuett, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D41822 llvm-svn: 322172
* [ARM GlobalISel] Add inst selector tests for G_FNEG s32 and s64Diana Picus2018-01-102-0/+154
| | | | | | | G_FNEG is already handled by the TableGen'erated code. Just add a few tests to make sure everything works as expected. llvm-svn: 322170
* [ARM GlobalISel] Map G_FNEG to the FPR bankDiana Picus2018-01-102-1/+51
| | | | llvm-svn: 322169
* [ARM GlobalISel] Legalize G_FNEG for s32 and s64Diana Picus2018-01-102-1/+83
| | | | | | | | | | | | | For hard float, it is legal. For soft float, we need to lower to 0 - x first, and then we can use the libcall for G_FSUB. This is undoing some of the canonicalization performed by the IRTranslator (which introduces G_FNEG when it sees a 0 - x). Ideally, that canonicalization would be performed by a pre-legalizer pass that would allow targets to opt out of this behaviour rather than dance around it in the legalizer. llvm-svn: 322168
* [TableGen][AsmMatcherEmitter] Generate assembler checks for tied operandsSander de Smalen2018-01-103-0/+159
| | | | | | | | | | | | | | | | | | | | Summary: This extends TableGen's AsmMatcherEmitter with code that generates a table with tied-operand constraints. The constraints are checked when parsing the instruction. If an operand is not equal to its tied operand, the assembler will give an error. Patch [2/3] in a series to add operand constraint checks for SVE's predicated ADD/SUB. Reviewers: olista01, rengolin, mcrosier, fhahn, craig.topper, evandro, echristo Reviewed By: fhahn Subscribers: javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D41446 llvm-svn: 322166
* Temporarily revertJonas Paulsson2018-01-102-77/+15
| | | | | | | | "[SystemZ] Check for legality before doing LOAD AND TEST transformations." , due to test failures. llvm-svn: 322165
* [ARM GlobalISel] Legalize s32/s64 G_FCONSTANTDiana Picus2018-01-102-3/+70
| | | | | | | | Legal for hard float. Change to G_CONSTANT for soft float (but preserve the binary representation). llvm-svn: 322164
* [SelectionDAGBuilder] Chain prefetches less aggressively.Jonas Paulsson2018-01-102-7/+99
| | | | | | | | | | | | | Prefetches used to always be chained between any previous and following memory accesses. The problem with this was that later optimizations, such as folding of a load into the user instruction, got disrupted. This patch relaxes the chaining of prefetches in order to remedy this. Reveiw: Hal Finkel https://reviews.llvm.org/D38886 llvm-svn: 322163
* [ARM GlobalISel] Legalize G_CONSTANT for scalars > 32 bitsDiana Picus2018-01-102-3/+15
| | | | | | Make G_CONSTANT narrow for any scalars larger than 32 bits. llvm-svn: 322162
* [SystemZ] Check for legality before doing LOAD AND TEST transformations.Jonas Paulsson2018-01-102-15/+77
| | | | | | | | | | Since a load and test instruction treat its operands as signed, it can only replace a logical compare for EQ/NE uses. Review: Ulrich Weigand https://bugs.llvm.org/show_bug.cgi?id=35662 llvm-svn: 322161
* [ORC] Incorporate Dave Blaikie's feedback on r319839.Lang Hames2018-01-101-21/+20
| | | | | | | | - Turn some member functions into free functions. - Avoid a redundant map lookup - Simplify a loop index llvm-svn: 322159
* [ExecutionEngine] Remove an unused variable.Lang Hames2018-01-101-1/+0
| | | | | | | Patch by Evgeniy Tyurin. Thanks Evgeniy! Review: https://reviews.llvm.org/D41431 llvm-svn: 322158
* Add explanatory comment to LoadStoreVectorizer.Justin Lebar2018-01-101-0/+32
| | | | | | | | | | Reviewers: arsenm Subscribers: rengolin, sanjoy, wdng, hiraditya, asbirlea Differential Revision: https://reviews.llvm.org/D41890 llvm-svn: 322157
* [MIR] Repurposing '$' sigil used by external symbols. Replacing with '&'.Puyan Lotfi2018-01-1040-198/+198
| | | | | | | | | | Planning to add support for named vregs. This puts is in a conundrum since physregs are named as well. To rectify this we need to use a sigil other than '%' for physregs in MIR. We've settled on using '$' for physregs but first we must repurpose it from external symbols using it, which is what this commit is all about. We think '&' will have familiar semantics for C/C++ users. llvm-svn: 322146
* [llvm-readobj] Consistent use of ScopedPrinterSam Clegg2018-01-108-72/+88
| | | | | | | | | There were a few places where outs() was being used directly rather than the ScopedPrinter object. Differential Revision: https://reviews.llvm.org/D41370 llvm-svn: 322141
* [ORC] Re-apply r321838 again with a workaround for a bug present in the libcxxLang Hames2018-01-106-0/+767
| | | | | | | | | | | | | version being used on some of the green dragon builders (plus a clang-format). Workaround: AsynchronousSymbolQuery and VSO want to work with JITEvaluatedSymbols anyway, so just use them (instead of JITSymbol, which happens to tickle the bug). The libcxx bug being worked around was fixed in r276003, and there are plans to update the offending builders. llvm-svn: 322140
* LowerTypeTests: Add limited support for aliasesVlad Tsyrklevich2018-01-106-0/+170
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: LowerTypeTests moves some function definitions from individual object files to the merged module, leaving a stub to be called in the merged module's jump table. If an alias was pointing to such a function definition LowerTypeTests would fail because the alias would be left without a definition to point to. This change 1) emits information about aliases to the ThinLTO summary, 2) replaces aliases pointing to function definitions that are moved to the merged module with function declarations, and 3) re-emits those aliases in the merged module pointing to the correct function definitions. The patch does not correctly fix all possible mis-uses of aliases in LowerTypeTests. For example, it does not handle aliases with a different type from the pointed to function. The addition of alias data increases the size of Chrome build artifacts by less than 1%. Reviewers: pcc Reviewed By: pcc Subscribers: mehdi_amini, eraman, mgrang, llvm-commits, eugenis, kcc Differential Revision: https://reviews.llvm.org/D41741 llvm-svn: 322139
* [LoopRotate] Detect loops with indirect branches better (we're giving up on ↵Michael Zolotukhin2018-01-092-3/+34
| | | | | | them). llvm-svn: 322137
* Reland "Emit Function IDs table for Control Flow Guard"Adrian McCarthy2018-01-0915-1/+338
| | | | | | | | | | | | | | | | | Adds option /guard:cf to clang-cl and -cfguard to cc1 to emit function IDs of functions that have their address taken into a section named .gfids$y for compatibility with Microsoft's Control Flow Guard feature. The original patch didn't have the lit.local.cfg file that restricts the new test to x86, thus the new test was failing on the non-x86 bots. Differential Revision: https://reviews.llvm.org/D40531 The reverts r322008, which was a revert of r322005. This reverts commit a05b89f9aca70597dc79fe97bc49b50b51f525ba. llvm-svn: 322136
* [WebAssembly] Add COMDAT supportSam Clegg2018-01-0913-32/+326
| | | | | | | | | | | | | | This adds COMDAT support to the Wasm object-file format. Spec: https://github.com/WebAssembly/tool-conventions/pull/31 Corresponding LLD change: https://bugs.llvm.org/show_bug.cgi?id=35533, and D40845 Patch by Nicholas Wilson Differential Revision: https://reviews.llvm.org/D40844 llvm-svn: 322135
* [DWARFv5] MC support for MD5 file checksumsPaul Robinson2018-01-0915-39/+147
| | | | | | | Extend .file directive syntax to allow specifying an MD5 checksum for the source file. Emit the checksums in DWARF v5 line tables. llvm-svn: 322134
* Tidy some grammar in some commentsEric Christopher2018-01-092-4/+4
| | | | llvm-svn: 322133
* tempJake Ehrlich2018-01-094-0/+104
| | | | llvm-svn: 322132
* Use a MCExpr for the size of MCFillFragment.Rafael Espindola2018-01-095-20/+46
| | | | | | | This allows the size to be found during ralaxation. This fixes pr35858. llvm-svn: 322131
* [WebAssembly] MC: Use zero for provisional value of undefined symbolsSam Clegg2018-01-093-5/+5
| | | | | | | | | | This is more in line with what happens in the final executable when symbols are undefined (i.e. weak references). Differential Revision: https://reviews.llvm.org/D41840 llvm-svn: 322130
* Add a test.Rafael Espindola2018-01-091-0/+4
| | | | | | Currently we don't have any tests for this error case. llvm-svn: 322129
* ADT: Add a range-based version of std::copyDavid Blaikie2018-01-091-0/+5
| | | | llvm-svn: 322127
* [IPSCCP] Remove calls without side effectsChris Bieneman2018-01-095-4/+49
| | | | | | | | | | | | | | | Summary: When performing constant propagation for call instructions we have historically replaced all uses of the return from a call, but not removed the call itself. This is required for correctness if the calls have side effects, however the compiler should be able to safely remove calls that don't have side effects. This allows the compiler to completely fold away calls to functions that have no side effects if the inputs are constant and the output can be determined at compile time. Reviewers: davide, sanjoy, bruno, dberlin Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D38856 llvm-svn: 322125
* [PowerPC] Manually schedule the prologue and epilogueStefan Pintilie2018-01-096-56/+114
| | | | | | | | | | | | | | | | | | | | | This patch makes the following changes to the schedule of instructions in the prologue and epilogue. The stack pointer update is moved down in the prologue so that the callee saves do not have to wait for the update to happen. Saving the lr is moved down in the prologue to hide the latency of the mflr. The stack pointer is moved up in the epilogue so that restoring of the lr can happen sooner. The mtlr is moved up in the epilogue so that it is away form the blr at the end of the epilogue. The latency of the mtlr can now be hidden by the loads of the callee saved registers. This commit is almost identical to this one: r322036 except that two warnings that broke build bots have been fixed. The revision number is D41737 as before. llvm-svn: 322124
* Don't create MCFillFragment directly.Rafael Espindola2018-01-092-32/+15
| | | | | | Instead use higher level APIs that take care of most bookkeeping. llvm-svn: 322123
* [WebAssembly] Explicitly specify function/global index space in YAMLSam Clegg2018-01-0923-70/+163
| | | | | | | | | | | These indexes are useful because they are not always zero based and functions and globals are referenced elsewhere by their index. This matches what we already do for the type index space. Differential Revision: https://reviews.llvm.org/D41877 llvm-svn: 322121
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