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* ARM: mark CPSR as clobbered for Windows VLAsSaleem Abdulrasool2017-08-172-0/+17
| | | | | | | | | | | | | When lowering a VLA, we emit a __chstk call. However, this call can internally clobber CPSR. We did not mark this register as an ImpDef, which could potentially allow a comparison to be hoisted above the call to `__chkstk`. In such a case, the CPSR could be clobbered, and the check invalidated. When the support was initially added, it seemed that the call would take care of preventing CPSR from being clobbered, but this is not the case. Mark the register as clobbered to fix a possible state corruption. llvm-svn: 311061
* [X86] Exchange the memory op predicate for PALIGNR/VPALIGNR. I accidentally ↵Craig Topper2017-08-171-2/+2
| | | | | | swapped them. llvm-svn: 311060
* [X86] Cleanup multiclasses for SSE/AVX2 PALIGNR. Add missing load patterns.Craig Topper2017-08-171-43/+21
| | | | | | | | We used to have a separate multiclass for AVX2 and SSE/AVX. Now we have one multiclass and pass the relevant differences. We were also missing load patterns, though we had them for the AVX-512 version. llvm-svn: 311059
* [X86] Remove patterns for PALIGNR with non-vXi8 types.Craig Topper2017-08-173-37/+5
| | | | llvm-svn: 311058
* Reapply: [ADCE][Dominators] Teach ADCE to preserve dominatorsJakub Kuderski2017-08-174-8/+109
| | | | | | | | | | | | | | | | | | | | | Summary: This patch teaches ADCE to preserve both DominatorTrees and PostDominatorTrees. I didn't notice any performance impact when bootstrapping clang with this patch. The patch was originally committed in r311039 and reverted in r311049. This revision fixes the problem with not adding a dependency on the DominatorTreeWrapperPass for the LegacyPassManager. Reviewers: dberlin, chandlerc, sanjoy, davide, grosser, brzycki Reviewed By: davide Subscribers: grandinj, zhendongsu, llvm-commits, david2050 Differential Revision: https://reviews.llvm.org/D35869 llvm-svn: 311057
* [X86] Put multiclass closer to its use and simplify slightly. NFCCraig Topper2017-08-161-10/+11
| | | | llvm-svn: 311055
* [X86] Use a static array instead of a SmallVector for a small fixed size ↵Craig Topper2017-08-161-2/+2
| | | | | | array. NFC llvm-svn: 311054
* [x86] add cmov promotion tests for D36711; NFCSanjay Patel2017-08-161-0/+107
| | | | | | | | This way we can see what the current codegen looks like. I've also explicitly added/removed the cmov attribute from the RUN lines, so we know exactly what we're checking in the runs. llvm-svn: 311052
* [InstCombine] Teach canEvaluateTruncated to handle arithmetic shift ↵Amjad Aboud2017-08-162-0/+43
| | | | | | | | (including those with vector splat shift amount) Differential Revision: https://reviews.llvm.org/D36784 llvm-svn: 311050
* Revert "[ADCE][Dominators] Teach ADCE to preserve dominators"Jakub Kuderski2017-08-164-106/+8
| | | | | | | This reverts commit r311039. The patch caused the `test/Bindings/OCaml/Output/scalar_opts.ml` to fail. llvm-svn: 311049
* [Analysis] Fix some Clang-tidy modernize and Include What You Use warnings; ↵Eugene Zelenko2017-08-1610-167/+311
| | | | | | other minor fixes (NFC). llvm-svn: 311048
* [InstCombine] Make folding (X >s -1) ? C1 : C2 --> ((X >>s 31) & (C2 - C1)) ↵Craig Topper2017-08-162-17/+73
| | | | | | | | | | + C1 support splat vectors This also uses decomposeBitTestICmp to decode the compare. Differential Revision: https://reviews.llvm.org/D36781 llvm-svn: 311044
* [ADCE][Dominators] Teach ADCE to preserve dominatorsJakub Kuderski2017-08-164-8/+106
| | | | | | | | | | | | | | | | | Summary: This patch teaches ADCE to preserve both DominatorTrees and PostDominatorTrees. I didn't notice any performance impact when bootstrapping clang with this patch. Reviewers: dberlin, chandlerc, sanjoy, davide, grosser, brzycki Reviewed By: davide Subscribers: grandinj, zhendongsu, llvm-commits, david2050 Differential Revision: https://reviews.llvm.org/D35869 llvm-svn: 311039
* [MachineCopyPropagation] Extend pass to do COPY source forwardingGeoff Berry2017-08-1689-488/+997
| | | | | | | | | | | | | | | | | | This change extends MachineCopyPropagation to do COPY source forwarding. This change also extends the MachineCopyPropagation pass to be able to be run during register allocation, after physical registers have been assigned, but before the virtual registers have been re-written, which allows it to remove virtual register COPY LiveIntervals that become dead through the forwarding of all of their uses. Reviewers: qcolombet, javed.absar, MatzeB, jonpa Subscribers: jyknight, nemanjai, llvm-commits, nhaehnle, mcrosier, mgorny Differential Revision: https://reviews.llvm.org/D30751 llvm-svn: 311038
* [CMake][runtimes] Support for building target variantsPetr Hosek2017-08-161-35/+58
| | | | | | | | | | This can be used to build non-sanitized and sanitized versions of runtimes, where sanitized versions use the just built sanitizer which in turn may use the non-sanitized version. Differential Revision: https://reviews.llvm.org/D36348 llvm-svn: 311036
* [LoopDataPrefetch][AArch64FalkorHWPFFix] Preserve ScalarEvolutionGeoff Berry2017-08-162-6/+2
| | | | | | | | | | | | | | | | | | | | | Summary: Mark LoopDataPrefetch and AArch64FalkorHWPFFix passes as preserving ScalarEvolution since they do not alter loop structure and should not alter any SCEV values (though LoopDataPrefetch may introduce new instructions that won't have cached SCEV values yet). This can result in slight code differences, mainly w.r.t. nsw/nuw flags on SCEVs, since these are computed somewhat lazily when a zext/sext instruction is encountered. As a result, passes after the modified passes may see SCEVs with more nsw/nuw flags present. Reviewers: sanjoy, anemet Subscribers: aemerson, rengolin, mzolotukhin, javed.absar, kristof.beyls, mcrosier, llvm-commits Differential Revision: https://reviews.llvm.org/D36716 llvm-svn: 311032
* [mips] Handle R_MIPS_TLS_DTPREL32/64 relocations in the RelocVisitorSimon Atanasyan2017-08-162-0/+26
| | | | | | | | Debug information for TLS variables on MIPS might have R_MIPS_TLS_DTPREL32 or R_MIPS_TLS_DTPREL64 relocations. This patch adds a support for such relocations in the `RelocVisitor`. llvm-svn: 311031
* Add a convenience overload of DWARFDie::dump() for debugging purposes.Adrian Prantl2017-08-162-0/+6
| | | | llvm-svn: 311026
* Add more commentXinliang David Li2017-08-161-1/+9
| | | | llvm-svn: 311025
* [PGO] Fix ThinLTO crash Xinliang David Li2017-08-163-0/+26
| | | | | | Differential Revsion: http://reviews.llvm.org/D36640 llvm-svn: 311023
* [AMDGPU] NFC: test commitEvgeny Mankov2017-08-161-10/+10
| | | | llvm-svn: 311019
* AMDGPU/NFC: Sort files in CMakeLists.txt alphabeticallyKonstantin Zhuravlyov2017-08-161-17/+17
| | | | llvm-svn: 311017
* [X86] Regenerate immediate store merging testsSimon Pilgrim2017-08-161-27/+71
| | | | llvm-svn: 311016
* [Dominators] Introduce batch updatesJakub Kuderski2017-08-166-96/+667
| | | | | | | | | | | | | | | | | Summary: This patch introduces a way of informing the (Post)DominatorTree about multiple CFG updates that happened since the last tree update. This makes performing tree updates much easier, as it internally takes care of applying the updates in lockstep with the (virtual) updates to the CFG, which is done by reverse-applying future CFG updates. The batch updater is able to remove redundant updates that cancel each other out. In the future, it should be also possible to reorder updates to reduce the amount of work needed to perform the updates. Reviewers: dberlin, sanjoy, grosser, davide, brzycki Reviewed By: brzycki Subscribers: mgorny, llvm-commits Differential Revision: https://reviews.llvm.org/D36167 llvm-svn: 311015
* [BDCE] Don't check demanded bits on unsized typesHal Finkel2017-08-162-2/+31
| | | | | | | | | | | | | | | To clear assumptions that are potentially invalid after trivialization, we need to walk the use/def chain. Normally, the only way to reach an instruction with an unsized type is via an instruction that has side effects (or otherwise will demand its input bits). That would stop the walk. However, if we have a readnone function that returns an unsized type (e.g., void), we must avoid asking for the demanded bits of the function call's return value. A void-returning readnone function is always dead (and so we can stop walking the use/def chain here), but the check is necessary to avoid asserting. Fixes PR34211. llvm-svn: 311014
* [Verifier] Reject globals without a type associated.Davide Italiano2017-08-162-0/+13
| | | | llvm-svn: 311012
* [AMDGPU][MC][GFX9] Added op_sel support for v_mad_*16, v_fma_f16, ↵Dmitry Preobrazhensky2017-08-163-66/+181
| | | | | | | | | | | | v_div_fixup_f16 This change implements features postponed in https://reviews.llvm.org/D35424 because of a dependency on https://reviews.llvm.org/D36322 Reviewers: SamWot, artem.tamazov, arsenm Differential Revision: https://reviews.llvm.org/D36694 llvm-svn: 311011
* [DemandedBits] simplify call; NFCSanjay Patel2017-08-161-1/+1
| | | | llvm-svn: 311009
* Revert "MachineInstr: Reason locally about some memory objects before going ↵Balaram Makam2017-08-1612-101/+78
| | | | | | | | | | | | | to AA." r310825 caused the clang-ppc64le-linux-lnt bot to go red (http://lab.llvm.org:8011/builders/clang-ppc64le-linux-lnt/builds/5712) because of a test-suite failure of SingleSource/UnitTests/2003-07-09-SignedArgs This reverts commit 0028f6a87224fb595a1c19c544cde9b003035996. llvm-svn: 311008
* [AMDGPU][MC][GFX9] Added integer clamping support for VOP3 opcodesDmitry Preobrazhensky2017-08-1617-85/+318
| | | | | | | | | | See Bug 34152: https://bugs.llvm.org//show_bug.cgi?id=34152 Reviewers: SamWot, artem.tamazov, arsenm Differential Revision: https://reviews.llvm.org/D36674 llvm-svn: 311006
* [CostModel][X86][XOP] Improve costs for XOP shufflesSimon Pilgrim2017-08-163-0/+68
| | | | | | VPPERM/VPERMIL2PD/VPERMIL2PS all provide more effective 2-input shuffles than regular AVX instructions llvm-svn: 311005
* [DI] Every DIGlobalVariable should have a type.Davide Italiano2017-08-163-9/+10
| | | | | | | I'll make this a verifier check to catch other violations. This commit fixes the tests already in tree. llvm-svn: 311004
* [mips] Handle variables with an explicit section and interactions with ↵Simon Dardis2017-08-162-0/+69
| | | | | | | | | | | | | | | | | | .sdata, .sbss If a variable has an explicit section such as .sdata or .sbss, it is placed in that section and accessed in a gp relative manner. This overrides the global -G setting. Otherwise if a variable has a explicit section attached to it, such as '.rodata' or '.mysection', it is not placed in the small data section. This also overrides the global -G setting. Reviewers: atanasyan, nitesh.jain Differential Revision: https://reviews.llvm.org/D36616 llvm-svn: 311001
* [ARM] Improve loop unrolling for Cortex-MSam Parker2017-08-162-98/+147
| | | | | | | | | | | - Set the default runtime unroll count to 4 and use the newly added UnrollRemainder option. - Create loop cost and force unroll for a cost less than 12. - Disable unrolling on Thumb1 only targets. Differential Revision: https://reviews.llvm.org/D36134 llvm-svn: 310997
* [GlobalISel][X86] Fix mir tests, use correct physical register.NFC.Igor Breger2017-08-163-21/+36
| | | | llvm-svn: 310996
* [COFF] Make the weak aliases optionalMartin Storsjo2017-08-163-4/+5
| | | | | | | | | | | | | | | | When creating an import library from lld, the cases with Name != ExtName shouldn't end up as a weak alias, but as a real export of the new name, which is what actually is exported from the DLL. This restores the behaviour of renamed exports to what it was in 4.0. The other half of this commit, including test, goes into lld. Differential Revision: https://reviews.llvm.org/D36633 llvm-svn: 310991
* [llvm-dlltool] Fix creating stdcall/fastcall import libraries for i386Martin Storsjo2017-08-164-4/+52
| | | | | | | | | | | | | | | | | | | | | Hook up the -k option (that in the original GNU dlltool removes the @n suffix from the symbol that the final executable ends up linked to). In llvm-dlltool, make sure that functions end up with the undecorate name type if this option is set and they are decorated. In mingw, when creating import libraries from def files instead of creating an import library as a side effect of linking a DLL, the symbol names in the def contain the stdcall/fastcall decoration (but no leading underscore). By setting the undecorate name type, a linker linking to the import library will omit the decoration from the DLL import entry. With this in place, mingw-w64 for i386 built with llvm-dlltool/clang produces import libraries that actually work. Differential Revision: https://reviews.llvm.org/D36548 llvm-svn: 310990
* [COFF] Add SymbolName as a distinct field in COFFImportFileMartin Storsjo2017-08-162-1/+2
| | | | | | | | | | | The previous Name and ExtName aren't enough to convey all the nuances between weak aliases and stdcall decorated function names. A test for this will be added in LLD. Differential Revision: https://reviews.llvm.org/D36544 llvm-svn: 310988
* [AMDGPU] Eliminate no effect instructions before s_endpgmStanislav Mekhanoshin2017-08-1615-32/+406
| | | | | | Differential Revision: https://reviews.llvm.org/D36585 llvm-svn: 310987
* Merge debug info when hoist then-else code to if.Dehao Chen2017-08-162-0/+41
| | | | | | | | | | | | | | Summary: When we move then-else code to if, we need to merge its debug info, otherwise the hoisted instruction may have inaccurate debug info attached. Reviewers: aprantl, probinson, dblaikie, echristo, loladiro Reviewed By: aprantl Subscribers: sanjoy, llvm-commits Differential Revision: https://reviews.llvm.org/D36778 llvm-svn: 310985
* [WebAssembly] Remove infinite loop from reg-stackify testDerek Schuff2017-08-161-1/+3
| | | | | | | | | | | | | r310940 exposed reverse-unreachable code to some optimizers, which caused some of the code in this test to be sunk, changing the input to the pass and breaking the exptectations. Since that change is irrelevant to this particular test, this change just adds an exit node to work around the problem; the test should really be more robust (or be an MIR test?) but this preserves the existing test intent. llvm-svn: 310981
* [VirtRegRewriter] Properly model the register liveness on undef subreg ↵Quentin Colombet2017-08-162-1/+113
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | definition Undef subreg definition means that the content of the super register doesn't matter at this point. While that's true for virtual registers, this may not hold when replacing them with actual physical registers. Indeed, some part of the physical register may be coalesced with the related virtual register and thus, the values for those parts matter and must be live. The fix consists in checking whether or not subregs of the physical register being assigned to an undef subreg definition are live through that def and insert an implicit use if they are. Doing so, will keep them alive until that point like they should be. E.g., let vreg14 being assigned to R0_R1 then %vreg14:gsub_0<def,read-undef> = COPY %R0 ; <-- R1 is still live here %vreg14:gsub_1<def> = COPY %R1 Before this changes, the rewriter would change the code into: %R0<def> = KILL %R0, %R0_R1<imp-def> ; <-- this tells R1 is redefined %R1<def> = KILL %R1, %R0_R1<imp-def>, %R0_R1<imp-use> ; this value of this R1 ; is believed to come ; from the previous ; instruction Because of this invalid liveness, later pass could make wrong choices and in particular clobber live register as it happened with the register scavenger in llvm.org/PR34107 Now we would generate: %R0<def> = KILL %R0, %R0_R1<imp-def>, %R0_R1<imp-use> ; This tells R1 needs to ; reach this point %R1<def> = KILL %R1, %R0_R1<imp-def>, %R0_R1<imp-use> The bug has been here forever, it got exposed recently because the register scavenger got smarter. Fixes llvm.org/PR34107 llvm-svn: 310979
* Revert archive-* tests from r310953, there were test failures.Kuba Mracek2017-08-155-5/+5
| | | | llvm-svn: 310974
* [InstCombine] Teach canEvaluateZExtd and canEvaluateTruncated to handle ↵Craig Topper2017-08-152-10/+71
| | | | | | | | | | vector shifts with splat shift amount We were only allowing ConstantInt before. This patch allows splat of ConstantInt too. Differential Revision: https://reviews.llvm.org/D36763 llvm-svn: 310970
* Reapply "[GlobalISel] Remove the GISelAccessor API."Quentin Colombet2017-08-1511-241/+76
| | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit r310425, thus reapplying r310335 with a fix for link issue of the AArch64 unittests on Linux bots when BUILD_SHARED_LIBS is ON. Original commit message: [GlobalISel] Remove the GISelAccessor API. Its sole purpose was to avoid spreading around ifdefs related to building global-isel. Since r309990, GlobalISel is not optional anymore, thus, we can get rid of this mechanism all together. NFC. ---- The fix for the link issue consists in adding the GlobalISel library in the list of dependencies for the AArch64 unittests. This dependency comes from the use of AArch64Subtarget that needs to know how to destruct the GISel related APIs when being detroyed. Thanks to Bill Seurer and Ahmed Bougacha for helping me reproducing and understand the problem. llvm-svn: 310969
* [ThinLTO] Fix ThinLTO crash while destroying contextCharles Saternos2017-08-152-6/+17
| | | | | | | | Fix for PR32763 An assert that checks if a Ref was untracked fails during ThinLTO context cleanup. The issue is because lazy loading temporary nodes didn't properly track ValueAsMetadata nodes. This patch ensures that the temporary nodes are properly tracked when they're replaced with the value. llvm-svn: 310967
* Revert changes in r310953 for llvm-symbolizer.test. The change causes a test ↵Kuba Mracek2017-08-151-49/+48
| | | | | | failure. llvm-svn: 310956
* Update AMDGPUUsage.rst documentation:Tony Tye2017-08-151-271/+315
| | | | | | | | | | | | 1. Correct description of the kernel initial state for FLAT_SCRATCH_INIT. 2. Add link to GFX9 architecture documentation. 3. Update product names. 4. Rename note record from NT_AMD_AMDGPU_METADATA to NT_AMD_AMDGPU_HSA_METADATA and move description to the AMDHSA coding convention section. 5. Minor typo corrections. Differential Revision: https://reviews.llvm.org/D36549 llvm-svn: 310954
* [llvm] Get rid of "%T" expansionsKuba Mracek2017-08-1568-364/+395
| | | | | | | | | | The %T lit expansion expands to a common directory shared between all the tests in the same directory, which is unexpected and unintuitive, and more importantly, it's been a source of subtle race conditions and flaky tests. In https://reviews.llvm.org/D35396, it was agreed that it would be best to simply ban %T and only keep %t, which is unique to each test. When a test needs a temporary directory, it can just create one using mkdir %t. This patch removes %T in llvm. Differential Revision: https://reviews.llvm.org/D36495 llvm-svn: 310953
* [InstCombine] Added support for (X >>s C) << C --> X & (-1 << C)Amjad Aboud2017-08-152-2/+18
| | | | | | Differential Revision: https://reviews.llvm.org/D36743 llvm-svn: 310949
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