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* Avoid PLT for external calls when attribute nonlazybind is used.Sriraman Tallam2017-11-032-2/+32
| | | | | | Differential Revision: https://reviews.llvm.org/D39065 llvm-svn: 317292
* Reland "Add feature to determine if host architecture is 64-bit in llvm-lit"Jake Ehrlich2017-11-021-0/+1
| | | | | | | | | | A member of config was removed in this patch which resulted in errors I didn't expect. Removing config.host_arch will take more work some I'm readding that field. Differential Revision: https://reviews.llvm.org/D39465 llvm-svn: 317289
* [Verifier] Remove the -verify-debug-info cl::optVedant Kumar2017-11-023-4/+2
| | | | | | | This cl::opt has been dead for a while. It's no longer possible to run the verifier without also verifying debug info. llvm-svn: 317288
* [AArch64][RegisterBankInfo] Add mapping for G_FPEXT.Quentin Colombet2017-11-024-1/+193
| | | | | | | | | | This fixes http://llvm.org/PR32560. We were missing a description for half floating point type and as a result were using the FPR 32 mapping. Because of the size mismatch the generic code was complaining that the default mapping is not appropriate. Fix the mapping description so that the default mapping can be properly applied. llvm-svn: 317287
* [AArch64][RegisterBankInfo] Add FPR16 support in value mapping.Quentin Colombet2017-11-023-35/+48
| | | | | | NFC. llvm-svn: 317286
* mir-canon: First commit.Puyan Lotfi2017-11-024-0/+629
| | | | | | | | | | | | | | | mir-canon (MIRCanonicalizerPass) is a pass designed to reorder instructions and rename operands so that two similar programs will diff more cleanly after being run through mir-canon than they would otherwise. This project is still a work in progress and there are ideas still being discussed for improving diff quality. M include/llvm/InitializePasses.h M lib/CodeGen/CMakeLists.txt M lib/CodeGen/CodeGen.cpp A lib/CodeGen/MIRCanonicalizerPass.cpp llvm-svn: 317285
* [llvm-objcopy] Fix bug in how segment alignment was being handledJake Ehrlich2017-11-023-3/+124
| | | | | | | | | | | | | | | Just aligning segment offsets to segment alignment is incorrect and also wastes more space than is needed. The requirement is that p_offset == p_addr modulo p_align *not* that p_offset == 0 modulo p_align. Generally speaking we've been using p_addr == 0 modulo p_align. In fact yaml2obj can't even produce a valid situation which causes llvm-objcopy to produce incorrect results because alignment and offset were both inherited from the sections the program header covers. This change fixes this bad behavior in llvm-objcopy. Differential Revision: https://reviews.llvm.org/D39132 llvm-svn: 317284
* [X86] Give AVX512VL instructions priority over their AVX equivalents.Craig Topper2017-11-024-18/+38
| | | | | | I thought we had gotten all these priority bugs worked out, but I guess not. llvm-svn: 317283
* IndVarSimplify: preserve debug information attached to widened PHI nodes.Adrian Prantl2017-11-022-0/+81
| | | | | | | | | | This fixes PR35015. https://bugs.llvm.org/show_bug.cgi?id=35015 Differential Revision: https://reviews.llvm.org/D39345 llvm-svn: 317282
* Add feature to determine if host architecture is 64-bit in llvm-litJake Ehrlich2017-11-022-1/+4
| | | | | | | | | | | | | | I have a test that I'd like to add to llvm that demands using more than 32-bits worth of address space. This test can't be run on 32-bit systems because they don't have enough address space. The host triple should be used to determine this instead of config.host_arch because on Debian systems config.host_arch is not correct. This change adds the "host-arch-is-64bit" feature to allow tests to restrict themselves to the 64-bit case. Differential Revision: https://reviews.llvm.org/D39465 llvm-svn: 317281
* AMDGPU: Fix warning discovered by r317266 [-Wunused-private-field]Konstantin Zhuravlyov2017-11-021-1/+0
| | | | llvm-svn: 317280
* Irreducible loop metadata for more accurate block frequency under PGO.Hiroshi Yamauchi2017-11-0221-10/+600
| | | | | | | | | | | | | | | | | | | | | | | Summary: Currently the block frequency analysis is an approximation for irreducible loops. The new irreducible loop metadata is used to annotate the irreducible loop headers with their header weights based on the PGO profile (currently this is approximated to be evenly weighted) and to help improve the accuracy of the block frequency analysis for irreducible loops. This patch is a basic support for this. Reviewers: davidxl Reviewed By: davidxl Subscribers: mehdi_amini, llvm-commits, eraman Differential Revision: https://reviews.llvm.org/D39028 llvm-svn: 317278
* [Hexagon] Prefer L2_loadrub_io over L4_loadrub_rrKrzysztof Parzyszek2017-11-022-52/+92
| | | | | | | If the offset is an immediate, avoid putting it in a register to get Rs+Rt<<#0. llvm-svn: 317275
* [tools] Add option to install binutils symlinksShoaib Meenai2017-11-0212-0/+48
| | | | | | | | | | | | The LLVM tools can be used as a replacement for binutils, in which case it's convenient to create symlinks with the binutils names. Add support for these symlinks in the build system. As with any other llvm tool symlinks, the user can limit the installed symlinks by only adding the desired ones to `LLVM_TOOLCHAIN_TOOLS`. Differential Revision: https://reviews.llvm.org/D39530 llvm-svn: 317272
* Clean up comments in include/llvm-c/DebugInfo.hAdrian Prantl2017-11-021-59/+84
| | | | | | | | Patch by Harlan Haskins! Differential Revision: https://reviews.llvm.org/D39568 llvm-svn: 317271
* [LoopPredication] Enable predication when latchCheckIV is wider than rangeCheckAnna Thomas2017-11-022-10/+234
| | | | | | | | | | | | | | | | | | | | | | Summary: This patch allows us to predicate range checks that have a type narrower than the latch check type. We leverage SCEV analysis to identify a truncate for the latchLimit and latchStart. There is also safety checks in place which requires the start and limit to be known at compile time. We require this to make sure that the SCEV truncate expr for the IV corresponding to the latch does not cause us to lose information about the IV range. Added tests show the loop predication over range checks that are of various types and are narrower than the latch type. This enhancement has been in our downstream tree for a while. Reviewers: apilipenko, sanjoy, mkazantsev Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D39500 llvm-svn: 317269
* Add missing header guards.Adrian Prantl2017-11-021-0/+5
| | | | llvm-svn: 317267
* AMDGPU: Remove outdated fixme (it was already fixed)Konstantin Zhuravlyov2017-11-021-3/+0
| | | | llvm-svn: 317266
* [cmake] Remove policy conditionalsShoaib Meenai2017-11-021-27/+13
| | | | | | | | | | | | | | LLVM now requires a minimum of cmake 3.4.3, and all the policies currently being set are present in that cmake version, so the conditionals will always be true and are therefore unnecessary. The movation is that the conditionals can give the false impression that the policy settings are optional, whereas for example it's necessary to set CMP0056 in order for `check_linker_flags` to operate correctly after r316972. Inline the project version and language setting in the process. Differential Revision: https://reviews.llvm.org/D39442 llvm-svn: 317264
* Fix llvm-dsymutil test in -DLLVM_ENABLE_THREADS=OFF modeHans Wennborg2017-11-021-4/+5
| | | | | | | After r316999, tools/dsymutil/X86/alias.test started failing in builds that have threading disabled. llvm-svn: 317263
* [test] Move llvm-lib tests into tools/llvm-lib. NFC.Martin Storsjo2017-11-0212-0/+0
| | | | | | | | | | | | Similarly to SVN r317189 for llvm-dlltool, these are probably easier to find in a tools subdirectory with a name identical to the tool, than in a toplevel directory with a different name. This matches the move of LibDriver itself in SVN r302995. Differential Revision: https://reviews.llvm.org/D39531 llvm-svn: 317262
* [X86] Simplify the pentium4 code in getHostCPUName to be based on feature ↵Craig Topper2017-11-021-34/+6
| | | | | | | | flags. Don't use 'x86-64' ever. 'x86-64' has started to reflect a sort of generic tuning flag for more modern 64-bit CPUs. We probably shouldn't be using it as the name of an unidentifiable pentium4. So use nocona for all 64-bit pentium4s instead. llvm-svn: 317230
* [X86] Change getHostCPUName fallback code to not select 'x86-64' for unknown ↵Craig Topper2017-11-021-2/+7
| | | | | | | | CPUs in family 6 that has 64-bit support but not any newer SSE features. Use 'core2' instead We know that's the earliest CPU with 64-bit support. x86-64 has taken on a role of representing a more modern 64-bit CPU so we probably shouldn't be using that when we can't identify things. llvm-svn: 317229
* [dsymutil][doc] Improve wording in manpage and rename file.Jonas Devlieghere2017-11-027-92/+95
| | | | | | | | | | - Improve wording - Rename llvm-dsymutil to dsymutil - Name -arch=<arch> argument Differential revision: https://reviews.llvm.org/D39561 llvm-svn: 317226
* Strip off invariant.start because memory locations arent invariantAnna Thomas2017-11-022-9/+81
| | | | | | | | | | | | The original change was reverted in rL317217 because of the failure in the RS4GC testcase. I couldn't reproduce the failure on my local machine (macbook) but could reproduce it on a linux box. The failure was around removing the uses of invariant.start. The fix here is to just RAUW undef (which was the first implementation in D39388). This is perfectly valid IR as discussed in the review. llvm-svn: 317225
* Fixed line length style issue.Mitch Phillips2017-11-021-1/+2
| | | | | | | | | | Reviewers: zturner Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D39395 llvm-svn: 317223
* [TargetParser][AArch64] Reorder enum to preserve 5.0.0 libLLVM ABI.Chad Rosier2017-11-021-4/+4
| | | | | | | | | This is required for backporting r311659 to the 5.0.1 release. PR35060 Differential Revision: https://reviews.llvm.org/D39558 llvm-svn: 317222
* [dsymutil] Add a manpage for dsymutilJonas Devlieghere2017-11-024-6/+94
| | | | llvm-svn: 317221
* Revert "[RS4GC] Strip off invariant.start because memory locations arent ↵Anna Thomas2017-11-022-92/+9
| | | | | | | | invariant" This reverts commit r317215, investigating the test failure. llvm-svn: 317217
* [RS4GC] Strip off invariant.start because memory locations arent invariantAnna Thomas2017-11-022-9/+92
| | | | | | | | | | | | | | | | | | | | Summary: Invariant.start on memory locations has the property that the memory location is unchanging. However, this is not true in the face of rewriting statepoints for GC. Teach RS4GC about removing invariant.start so that optimizations after RS4GC does not incorrect sink a load from the memory location past a statepoint. Added test showcasing the issue. Reviewers: reames, apilipenko, dneilson Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D39388 llvm-svn: 317215
* Revert "[ExpandMemCmp] Split ExpandMemCmp from CodeGen into its own pass."Clement Courbet2017-11-0213-1352/+1200
| | | | | | | | | undefined reference to `llvm::TargetPassConfig::ID' on clang-ppc64le-linux-multistage This reverts commit eea333c33fa73ad225ef28607795984829f65688. llvm-svn: 317213
* [ExpandMemCmp] Split ExpandMemCmp from CodeGen into its own pass.Clement Courbet2017-11-0213-1200/+1352
| | | | | | | | | | | | | | | | | Summary: This is mostly a noop (most of the test diffs are renamed blocks). There are a few temporary register renames (eax<->ecx) and a few blocks are shuffled around. See the discussion in PR33325 for more details. Reviewers: spatel Subscribers: mgorny Differential Revision: https://reviews.llvm.org/D39456 llvm-svn: 317211
* [X86] Fix bug in legalize vector types - Split large loadsAyman Musa2017-11-023-1/+230
| | | | | | | | | | When splitting a large load to smaller legally-typed loads, the last load should be padded to reach the size of the previous one so a CONCAT_VECTORS node could reunite them again. The code currently pads the last load to reach the size of the first load (instead of the previous). Differential Revision: https://reviews.llvm.org/D38495 Change-Id: Ib60b55ed26ce901fabf68108daf52683fbd5013f llvm-svn: 317206
* [mips] Use register scavenging with MSA.Simon Dardis2017-11-024-41/+272
| | | | | | | | | | | | | | | | | MSA stores and loads to the stack are more likely to require an emergency GPR spill slot due to the smaller offsets available with those instructions. Handle this by overestimating the size of the stack by determining the largest offset presuming that all callee save registers are spilled and accounting of incoming arguments when determining whether an emergency spill slot is required. Reviewers: atanasyan Differential Revision: https://reviews.llvm.org/D39056 llvm-svn: 317204
* Temporary workaround for msan false positive.Sam McCall2017-11-021-1/+1
| | | | llvm-svn: 317203
* Adding test for extraxt sub vector load and store avx512Michael Zuckerman2017-11-021-0/+1458
| | | | | Change-Id: Iefcb0ec6b6aa1b530ce5358081f02e6e522a8e50 llvm-svn: 317202
* Allow inaccessiblememonly and inaccessiblemem_or_argmemonly to be overwriten ↵Yichao Yu2017-11-025-19/+160
| | | | | | | | | | | | | | | | | | | on call site with operand bundle Summary: Similar to argmemonly, readonly and readnone. Fix PR35128 Reviewers: andrew.w.kaylor, chandlerc, hfinkel Reviewed By: hfinkel Subscribers: hfinkel, llvm-commits Differential Revision: https://reviews.llvm.org/D39434 llvm-svn: 317201
* [AsmPrinterDwarf] Add support for .cfi_restore directiveFrancis Visoiu Mistrih2017-11-0210-31/+148
| | | | | | | | | | | | | | As of today we only use .cfi_offset to specify the offset of a CSR, but we never use .cfi_restore when the CSR is restored. If we want to perform a more advanced type of shrink-wrapping, we need to use .cfi_restore in order to switch the CFI state between blocks. This patch only aims at adding support for the directive. Differential Revision: https://reviews.llvm.org/D36114 llvm-svn: 317199
* [SimplifyCFG] Discard speculated dbg intrinsicsBjorn Pettersson2017-11-022-1/+94
| | | | | | | | | | | | | | | | | | | | | | | | | | Summary: SpeculativelyExecuteBB can flatten the CFG by doing speculative execution followed by a select instruction. When the speculatively executed BB contained dbg intrinsics the result could be a little bit weird, since those dbg intrinsics were inserted before the select in the flattened CFG. So when single stepping in the debugger, printing the value of the variable referenced in the dbg intrinsic, it could happen that it looked like the variable had values that never actually were assigned to the variable. This patch simply discards all dbg intrinsics that were found in the speculatively executed BB. Reviewers: aprantl, chandlerc, craig.topper Reviewed By: aprantl Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D39494 llvm-svn: 317198
* [ARM] and, or, xor and add with shl combineSam Parker2017-11-022-7/+293
| | | | | | | | | | | | | | | | | | | The generic dag combiner will fold: (shl (add x, c1), c2) -> (add (shl x, c2), c1 << c2) (shl (or x, c1), c2) -> (or (shl x, c2), c1 << c2) This can create constants which are too large to use as an immediate. Many ALU operations are also able of performing the shl, so we can unfold the transformation to prevent a mov imm instruction from being generated. Other patterns, such as b + ((a << 1) | 510), can also be simplified in the same manner. Differential Revision: https://reviews.llvm.org/D38084 llvm-svn: 317197
* The patch updates sched numbers for YMM AVX instrs such as VMOVx, VORx, ↵Andrew V. Tischenko2017-11-024-36/+129
| | | | | | | | | VXOR, VPERMILx, VBROADCASTx, etc. PR32857 should be closed. Differential Revision: https://reviews.llvm.org/D39227 llvm-svn: 317196
* Update go bindings to use new functions from rL317135.Sam McCall2017-11-023-35/+14
| | | | | | This fixes duplicate symbol problems. llvm-svn: 317195
* llvm-c/DebugInfo.h: Fix warning. [-Wdocumentation]NAKAMURA Takumi2017-11-021-1/+1
| | | | llvm-svn: 317191
* [test] Move llvm-dlltool tests into tools/llvm-dlltool. NFC.Martin Storsjo2017-11-024-0/+0
| | | | | | | | | A toplevel test directory DllTool isn't consistent with other similar tools. Differential Revision: https://reviews.llvm.org/D39513 llvm-svn: 317189
* [X86] Remove the model checks from the 486 detection code in Host.cppCraig Topper2017-11-021-14/+1
| | | | | | This just provided a bunch of comments to read and not much else. llvm-svn: 317185
* [X86] Simplify the detection of pentium-mmx in Host.cpp.Craig Topper2017-11-021-21/+6
| | | | | | Rather than looking at model numbers just check for the mmx feature flag. While there promote INTEL_PENTIUM_MMX to a CPU type instead of a subtype so that we don't have weird type with only one subtype. llvm-svn: 317184
* Revert "Remove some of the go specific C bindings for debug info now that ↵Eric Christopher2017-11-022-0/+29
| | | | | | | | they've been migrated into the main C API." This reverts commits r317151 and 317152 llvm-svn: 317154
* [X86] Fix fast-isel-int-float-conversion testSteven Wu2017-11-021-12/+0
| | | | | | | Test is failing due to the revert in r317136. Fix the test to make all the bots happy. llvm-svn: 317153
* Fix for go bindings header to match previous commit.Eric Christopher2017-11-021-10/+0
| | | | llvm-svn: 317152
* Remove some of the go specific C bindings for debug info now that they've ↵Eric Christopher2017-11-021-19/+0
| | | | | | | | been migrated into the main C API. Fixes a go bindings breakage after r317135. llvm-svn: 317151
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