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* tools/llvm-ld: Cygwin can handle #!shbang.NAKAMURA Takumi2011-02-091-1/+1
| | | | llvm-svn: 125165
* Evict a lighter single interference before attempting to split a live range.Jakob Stoklund Olesen2011-02-093-36/+64
| | | | | | | | | | | | | | Registers are not allocated strictly in spill weight order when live range splitting and spilling has created new shorter intervals with higher spill weights. When one of the new heavy intervals conflicts with a single lighter interval, simply evict the old interval instead of trying to split the heavy one. The lighter interval is a better candidate for splitting, it has a smaller use density. llvm-svn: 125151
* Set an allocation hint when rematting before a COPY.Jakob Stoklund Olesen2011-02-091-0/+4
| | | | | | This almost guarantees that the COPY will be coalesced. llvm-svn: 125140
* Fix one more case of splitting after the last split point.Jakob Stoklund Olesen2011-02-081-8/+10
| | | | llvm-svn: 125137
* Reorganize interference code to check LastSplitPoint first.Jakob Stoklund Olesen2011-02-081-29/+43
| | | | | | | The last split point can be anywhere in the block, so it interferes with the strictly monotonic requirements of advanceTo(). llvm-svn: 125132
* Don't open the file again in the gold plugin. To be able to do this, updateRafael Espindola2011-02-088-21/+58
| | | | | | MemoryBuffer::getOpenFile to not close the file descriptor. llvm-svn: 125128
* Revert both r121082 (which broke a bunch of constant pool stuff) and r125074 ↵Owen Anderson2011-02-089-129/+87
| | | | | | (which worked around it). This should get us back to the old, correct behavior, though it will make the integrated assembler unhappy for the time being. llvm-svn: 125127
* Support for .ifdef / .ifndef in the assembler parser. Patch by Joerg ↵Benjamin Kramer2011-02-083-1/+89
| | | | | | Sonnenberger. llvm-svn: 125120
* Also handle the situation where an indirect branch is the first (and last)Jakob Stoklund Olesen2011-02-081-6/+8
| | | | | | instruction in a basic block. llvm-svn: 125116
* Add LiveIntervals::addKillFlags() to recompute kill flags after register ↵Jakob Stoklund Olesen2011-02-083-0/+28
| | | | | | | | | allocation. This is a lot easier than trying to get kill flags right during live range splitting and rematerialization. llvm-svn: 125113
* Trim debug spewJakob Stoklund Olesen2011-02-081-1/+0
| | | | llvm-svn: 125109
* Avoid folding a load instruction into an instruction that redefines the ↵Jakob Stoklund Olesen2011-02-081-1/+5
| | | | | | | | register. The target hook doesn't know how to do that. (Neither do I). llvm-svn: 125108
* [AVX] Implement BUILD_VECTOR lowering for 256-bit vectors. ForDavid Greene2011-02-081-3/+64
| | | | | | | anything but the simplest of cases, lower a 256-bit BUILD_VECTOR by splitting it into 128-bit parts and recombining. llvm-svn: 125105
* Add SplitEditor::overlapIntv() to create small ranges where both registers ↵Jakob Stoklund Olesen2011-02-083-2/+53
| | | | | | | | | | | | | | | | | | | | | | are live. If a live range is used by a terminator instruction, and that live range needs to leave the block on the stack or in a different register, it can be necessary to have both sides of the split live at the terminator instruction. Example: %vreg2 = COPY %vreg1 JMP %vreg1 Becomes after spilling %vreg2: SPILL %vreg1 JMP %vreg1 The spill doesn't kill the register as is normally the case. llvm-svn: 125102
* Add assertion.Jakob Stoklund Olesen2011-02-081-3/+4
| | | | llvm-svn: 125101
* Added bugpoint options: -compile-custom and -compile-command=...Andrew Trick2011-02-083-30/+133
| | | | | | | | | I've been using this mode to narrow down llc unit tests. Example custom compile script: llc "$@" not pygrep.py 'mul\s+r([0-9]), r\1,' < bugpoint-test-program.s llvm-svn: 125096
* whitespaceAndrew Trick2011-02-082-12/+12
| | | | llvm-svn: 125095
* PostRA antidependence breaker unit test for PR8986.Andrew Trick2011-02-081-0/+89
| | | | llvm-svn: 125091
* PostRA antidependence breaker unit test for rdar://8959122.Andrew Trick2011-02-081-0/+128
| | | | llvm-svn: 125090
* Fix PostRA antidependence breaker.Andrew Trick2011-02-082-11/+49
| | | | | | | | Avoid using the same register for two def operands or and earlyclobber def and use operand. This fixes PR8986 and improves on the prior fix for rdar://problem/8959122. llvm-svn: 125089
* Temporary workaround for a bad bug introduced by r121082 which replacedEvan Cheng2011-02-082-8/+19
| | | | | | | | | | | | t2LDRpci with t2LDRi12. There are a couple of problems with this. 1. The encoding for the literal and immediate constant are different. Note bit 7 of the literal case is 'U' so it can be negative. 2. t2LDRi12 is now narrowed to tLDRpci before constant island pass is run. So we end up never using the Thumb2 instruction, which ends up creating a lot more constant islands. llvm-svn: 125074
* Don't split any loop backedges, including backedges of loops other thanDan Gohman2011-02-081-15/+17
| | | | | | | | the active loop. This is generally desirable, and it avoids trouble in situations such as the testcase in PR9123, though the failure mode depends on use-list order, so it is infeasible to test. llvm-svn: 125065
* Add LiveIntervals::shrinkToUses().Jakob Stoklund Olesen2011-02-084-23/+141
| | | | | | | | After uses of a live range are removed, recompute the live range to only cover the remaining uses. This is necessary after rematerializing the value before some (but not all) uses. llvm-svn: 125058
* SimplifyCFG: Track the number of used icmps when turning a icmp chain into a ↵Benjamin Kramer2011-02-074-17/+52
| | | | | | | | switch. If we used only one icmp, don't turn it into a switch. Also prevent the switch-to-icmp transform from creating identity adds, noticed by Marius Wachtler. llvm-svn: 125056
* Add support for parsing dmb/dsb instructionsBruno Cardoso Lopes2011-02-075-9/+148
| | | | llvm-svn: 125055
* Remove comment about an argument that was removed couple of years ago.Devang Patel2011-02-071-1/+0
| | | | llvm-svn: 125054
* Remove the MCR asm parser hack and start using the custom target specific asmBruno Cardoso Lopes2011-02-072-31/+106
| | | | | | | | | | | | | | | | | | parsing of operands introduced in r125030. As a small note, besides using a more generic approach we can also have more descriptive output when debugging llvm-mc, example: mcr p7, #1, r5, c1, c1, #4 note: parsed instruction: ['mcr', <ARMCC::al>, <coprocessor number: 7>, 1, <register 73>, <coprocessor register: 1>, <coprocessor register: 1>, 4] llvm-svn: 125052
* fix comment change.Chris Lattner2011-02-071-1/+1
| | | | llvm-svn: 125047
* Implement support for custom target specific asm parsing of operands.Bruno Cardoso Lopes2011-02-072-3/+268
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Motivation: Improve the parsing of not usual (different from registers or immediates) operand forms. This commit implements only the generic support. The ARM specific modifications will come next. A table like the one below is autogenerated for every instruction containing a 'ParserMethod' in its AsmOperandClass static const OperandMatchEntry OperandMatchTable[20] = { /* Mnemonic, Operand List Mask, Operand Class, Features */ { "cdp", 29 /* 0, 2, 3, 4 */, MCK_Coproc, Feature_IsThumb|Feature_HasV6 }, { "cdp", 58 /* 1, 3, 4, 5 */, MCK_Coproc, Feature_IsARM }, A matcher function very similar (but lot more naive) to MatchInstructionImpl scans the table. After the mnemonic match, the features are checked and if the "to be parsed" operand index is present in the mask, there's a real match. Then, a switch like the one below dispatch the parsing to the custom method provided in 'ParseMethod': case MCK_Coproc: return TryParseCoprocessorOperandName(Operands); llvm-svn: 125030
* [AVX] Insert/extract subvector lowering support. This includes aDavid Greene2011-02-071-2/+101
| | | | | | | couple of utility functions that will be used in other places for more AVX lowering. llvm-svn: 125029
* ARM/MC/ELF Lowercase .cpu attributes in .s, but make them uppercase in .oJason W Kim2011-02-071-3/+3
| | | | llvm-svn: 125025
* Fix an obvious typo which caused an isel assertion. rdar://8964854.Evan Cheng2011-02-072-1/+18
| | | | llvm-svn: 125023
* Reduce test case, smaller is better.Devang Patel2011-02-071-789/+33
| | | | llvm-svn: 125019
* Add codegen support for using post-increment NEON load/store instructions.Bob Wilson2011-02-0714-145/+927
| | | | | | | | The vld1-lane, vld1-dup and vst1-lane instructions do not yet support using post-increment versions, but all the rest of the NEON load/store instructions should be handled now. llvm-svn: 125014
* Change VLD3/4 and VST3/4 for quad registers to not update the address register.Bob Wilson2011-02-073-65/+89
| | | | | | | | | | | | These operations are expanded to pairs of loads or stores, and the first one uses the address register update to produce the address for the second one. So far, the second load/store has also updated the address register, just for convenience, since that output has never been used. In anticipation of actually supporting post-increment updates for these operations, this changes the non-updating operations to use a non-updating load/store for the second instruction. llvm-svn: 125013
* Fix some NEON instruction itineraries.Bob Wilson2011-02-071-12/+16
| | | | llvm-svn: 125012
* Fix a comment: addrmode6 no longer includes the optional writeback flag.Bob Wilson2011-02-071-1/+1
| | | | llvm-svn: 125011
* Remove inaccurate comments: so_imm and t2_so_imm operands are not encodedBob Wilson2011-02-072-8/+2
| | | | | | until the instructions are emitted or printed. llvm-svn: 125010
* Move code for OffsetCompare struct closer to where it is used.Bob Wilson2011-02-071-11/+11
| | | | llvm-svn: 125009
* implement .ll and .bc support for nsw/nuw on shl and exact on lshr/ashr.Chris Lattner2011-02-078-211/+239
| | | | | | Factor some code better. llvm-svn: 125006
* Add an m_Div pattern for matching either a udiv or an sdiv and use itDuncan Sands2011-02-072-4/+36
| | | | | | to simplify the "(X/Y)*Y->X when the division is exact" transform. llvm-svn: 125004
* Add IRBuilder methods for creating an exact udiv, like for exact sdiv.Duncan Sands2011-02-076-1/+37
| | | | llvm-svn: 125002
* Install only *.cmake files. Don't install .svn directory.Oscar Fuentes2011-02-071-1/+2
| | | | | | Fixes PR9159. llvm-svn: 125001
* Teach ARM/MC/ELF about gcc compatible reloc output to get past odd linkageJason W Kim2011-02-074-3/+265
| | | | | | | | | | | | | | | | | | failures with relocations. The code committed is a first cut at compatibility for emitted relocations in ELF .o. Why do this? because existing ARM tools like emitting relocs symbols as explicit relocations, not as section-offset relocs. Result is that with these changes, 1) relocs are now substantially identical what to gcc outputs. 2) larger apps (including many spec2k tests) compile, cross-link, and pass Added reminder fixme to tests for future conversion to .s form. llvm-svn: 124996
* Rework some .ARM.attribute work for improved gcc compatibility.Jason W Kim2011-02-074-30/+119
| | | | | | | Unified EmitTextAttribute for both Asm and Obj emission (.cpu only) Added necessary cortex-A8 related attrs for codegen compat tests. llvm-svn: 124995
* teach instsimplify to transform (X / Y) * Y to XChris Lattner2011-02-062-3/+25
| | | | | | when the div is an exact udiv. llvm-svn: 124994
* rename test.Chris Lattner2011-02-061-0/+0
| | | | llvm-svn: 124993
* enhance vmcore to know that udiv's can be exact, and add a trivialChris Lattner2011-02-0614-32/+110
| | | | | | | | instcombine xform to exercise this. Nothing forms exact udivs yet though. This is progress on PR8862 llvm-svn: 124992
* Remove premature optimization that avoided calculating argument weightsEric Christopher2011-02-061-5/+0
| | | | | | | | | if we weren't going to inline the function. The rest of the code using this was removed. Fixes PR9154. llvm-svn: 124991
* Simplify test, as suggested by Chris.Anders Carlsson2011-02-061-6/+2
| | | | llvm-svn: 124990
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