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* [LoopAccesses] Rename LoopAccessAnalysis to LoopAccessInfoAdam Nemet2015-02-183-35/+34
| | | | | | | | | LoopAccessAnalysis will be used as the name of the pass. This is part of the patchset that converts LoopAccessAnalysis into an actual analysis pass. llvm-svn: 229621
* [LoopAccesses] Make raw_string_ostream local in VectorizationReportAdam Nemet2015-02-181-6/+5
| | | | | | | | | | | | | Since VectorizationReport will be part of the result of the analysis it will be stored in a container. However, one of its members is a raw_string_ostream which cannot be copy-constructed. This makes the raw_string_ostream local to the << operator. This is part of the patchset that converts LoopAccessAnalysis into an actual analysis pass. llvm-svn: 229620
* [InstCombine] Do not insert a GEP instruction before a landingpad instruction.Akira Hatanaka2015-02-182-4/+48
| | | | | | | | | | | InstCombiner::visitGetElementPtrInst was using getFirstNonPHI to compute the insertion point, which caused the verifier to complain when a GEP was inserted before a landingpad instruction. This commit fixes it to use getFirstInsertionPt instead. rdar://problem/19394964 llvm-svn: 229619
* [BDCE] Don't forget uses of root instructions seen before the instruction itselfHal Finkel2015-02-182-3/+43
| | | | | | | | | | | | | | | | | When visiting the initial list of "root" instructions (those which must always be alive), for those that are integer-valued (such as invokes returning an integer), we mark their bits as (initially) all dead (we might, obviously, find uses of those bits later, but all bits are assumed dead until proven otherwise). Don't do so, however, if we're already seen a use of those bits by another root instruction (such as a store). Fixes a miscompile of the sanitizer unit tests on x86_64. Also, add a debug line for visiting the root instructions, and remove a debug line which tried to print instructions being removed (printing dead instructions is dangerous, and can sometimes crash). llvm-svn: 229618
* R600/SI: Rename dst encoding field to be consistent with docsMatt Arsenault2015-02-182-4/+4
| | | | | | The docs call this vdst instead of just dst. llvm-svn: 229614
* R600/SI: Consistently capitalize encoding field namesMatt Arsenault2015-02-183-142/+119
| | | | | | | | | | Some formats capitalized these, but most didn't. Change them all to be consistently lowercase. Now, non-encoding fields and convenience bits are capitalized. Also remove weird looking empty line in some of the formats. llvm-svn: 229613
* R600/SI: Set noNamedPositionallyEncodedOperandsMatt Arsenault2015-02-181-0/+1
| | | | llvm-svn: 229612
* R600/SI: Fix src1_modifiers for class instructionsMatt Arsenault2015-02-181-2/+26
| | | | | | | | src1 doesn't have modifiers, but the operand was missing resulting in an encoding build error when all fields are required.' llvm-svn: 229611
* R600/SI: Fix not setting clamp / omod for v_cndmask_b32_e64Matt Arsenault2015-02-182-3/+5
| | | | | | | Rename the multiclass since it now applies to the output modifiers as well. llvm-svn: 229610
* R600: Fix operand encoding errorMatt Arsenault2015-02-181-0/+1
| | | | llvm-svn: 229609
* R600/SI: Fix encoding error from glc bit on VI SMRD instructionsMatt Arsenault2015-02-181-1/+5
| | | | llvm-svn: 229608
* R600/SI: Fix operand encoding for flat instructionsMatt Arsenault2015-02-181-2/+4
| | | | llvm-svn: 229607
* R600/SI: Fix error from vdst on no return atomicsMatt Arsenault2015-02-181-3/+5
| | | | | | | Set the ignored field to 0 so we can enable noNamedPositionallyEncodedOperands. llvm-svn: 229606
* R600/SI: Add missing offset operand to buffer bothenMatt Arsenault2015-02-183-24/+36
| | | | llvm-svn: 229605
* R600/SI: Add missing soffset operand to global atomicsMatt Arsenault2015-02-182-2/+11
| | | | llvm-svn: 229604
* R600/SI: Fix brace identationMatt Arsenault2015-02-181-1/+1
| | | | llvm-svn: 229603
* Re-apply "InstrProf: Add unit tests for the profile reader and writer"Justin Bogner2015-02-186-15/+158
| | | | | | | | | | | | | | Have the InstrProfWriter return a MemoryBuffer instead of a std::string. This fixes the alignment issues the reader would hit, and it's a more appropriate type for this anyway. I've also removed an ugly helper function that's not needed since we're allowing initializer lists now, and updated some error code checks based on MSVC's issues with r229473. This reverts r229483, reapplying r229478. llvm-svn: 229602
* LiveRangeCalc: Rename some parameters from kill to use, NFC.Matthias Braun2015-02-184-40/+39
| | | | | | Those parameters did not necessarily describe kill points but just uses. llvm-svn: 229601
* Generalize getExtendAddRecStart to work with both sign and zeroSanjoy Das2015-02-182-143/+315
| | | | | | | | | | | extensions. This change also removes `DEBUG(dbgs() << "SCEV: untested prestart overflow check\n");` because that case has a unit test now. Differential Revision: http://reviews.llvm.org/D7645 llvm-svn: 229600
* [shuffles] Tweak my shufflevector fuzz test generation script to produceChandler Carruth2015-02-181-3/+2
| | | | | | more useful output. No more null bytes printed, and now with a newline. llvm-svn: 229599
* Downgrade build system error message to a warningFilipe Cabecinhas2015-02-181-2/+5
| | | | | | | Instead of requiring MSVC 2013 U4, we simply warn users, since some might not bt able to immediately upgrade. llvm-svn: 229598
* Make the Mips AsmPrinter independent of global subtargetEric Christopher2015-02-182-11/+23
| | | | | | | | | | | | | | initialization. Initialize the subtarget once per function and migrate EmitStartOfAsmFile to either use calls on the TargetMachine or get information from the subtarget we'd use for assembling. The top-level-ness of the MIPS attribute output for assembly is, by nature, contrary to how we'd want to do this for an LTO situation where we have multiple cpu architectures so this solution is good enough for now. llvm-svn: 229596
* Unify selectMipsCPU implementations.Eric Christopher2015-02-183-20/+11
| | | | llvm-svn: 229595
* Bugfix: SCEV incorrectly marks certain expressions as nswSanjoy Das2015-02-181-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I could not come up with a test case for this one; but I don't think `getPreStartForSignExtend` can assume `AR` is `nsw` -- there is one place in scalar evolution that calls `getSignExtendAddRecStart(AR, ...)` without proving that `AR` is `nsw` (line 1564) OperandExtendedAdd = getAddExpr(WideStart, getMulExpr(WideMaxBECount, getZeroExtendExpr(Step, WideTy))); if (SAdd == OperandExtendedAdd) { // If AR wraps around then // // abs(Step) * MaxBECount > unsigned-max(AR->getType()) // => SAdd != OperandExtendedAdd // // Thus (AR is not NW => SAdd != OperandExtendedAdd) <=> // (SAdd == OperandExtendedAdd => AR is NW) const_cast<SCEVAddRecExpr *>(AR)->setNoWrapFlags(SCEV::FlagNW); // Return the expression with the addrec on the outside. return getAddRecExpr(getSignExtendAddRecStart(AR, Ty, this), getZeroExtendExpr(Step, Ty), L, AR->getNoWrapFlags()); } Differential Revision: http://reviews.llvm.org/D7640 llvm-svn: 229594
* [modules] Fix typo in DIA exclusion in module map.Richard Smith2015-02-181-10/+10
| | | | llvm-svn: 229591
* Twines should be passed by const ref.Rafael Espindola2015-02-172-4/+4
| | | | llvm-svn: 229590
* [X86][FastIsel] Teach how to select scalar integer to float/double conversions.Andrea Di Biagio2015-02-172-0/+93
| | | | | | | | | | | | This patch teaches fast-isel how to select a (V)CVTSI2SSrr for an integer to float conversion, and how to select a (V)CVTSI2SDrr for an integer to double conversion. Added test 'fast-isel-int-float-conversion.ll'. Differential Revision: http://reviews.llvm.org/D7698 llvm-svn: 229589
* Add r228939 back with a fix.Rafael Espindola2015-02-176-11/+41
| | | | | | | | | | | | | The problem in the original patch was not switching back to .text after printing an eh table. Original message: On ELF, put PIC jump tables in a non executable section. Fixes PR22558. llvm-svn: 229586
* We require MSVC 2013 Update 4 due to previous versions miscompiling ASTMatchersFilipe Cabecinhas2015-02-171-2/+2
| | | | | | | | | | Previous versions of MSVC 2013 would miscompile ASTMatchers (and/or their tests). Bump up the requirement and make sure we know about the minor revision. Minimum required version found by Michael Edwards! llvm-svn: 229584
* Add a test showing the problem in r228939.Rafael Espindola2015-02-171-0/+39
| | | | | | | If an EH table is printed in between the function and the jump table we would fail to switch back to the text section to print the jump table. llvm-svn: 229580
* IR: Add missing clone() overloadsDuncan P. N. Exon Smith2015-02-172-0/+70
| | | | | | | | | | Add missing specialized node overloads for `MDNode::clone()` (they were on most of the node types already, but missing from the others). `MDNode::clone()` returns `TempMDNode` (`std::unique_ptr<MDNode,...>`), while `TempMDSubrange::clone()` (for example) returns the more convenient `TempMDSubrange` (`std::unique_ptr<TempMDSubrange,...>`). llvm-svn: 229579
* rename variables again because these tables also deal with stores; NFCSanjay Patel2015-02-171-31/+31
| | | | | | Suggestion by Simon Pilgrim llvm-svn: 229574
* IR: fieldIsMDNode() should be false for MDStringDuncan P. N. Exon Smith2015-02-171-8/+1
| | | | | | | Simplify the code. It has been a while since the schema has been so "flexible". llvm-svn: 229573
* AsmPrinter: Take range in DwarfExpression::AddExpression(), NFCDuncan P. N. Exon Smith2015-02-174-6/+11
| | | | | | | | | | Previously `DwarfExpression::AddExpression()` relied on default-constructing the end iterators for `DIExpression` -- once the operands are represented explicitly via `MDExpression` (instead of via the strange `StringRef` navigator in `DIHeaderIterator`) this won't work. Explicitly take an iterator for the end of the range. llvm-svn: 229572
* [X86][SSE] Generalised unpckl/unpckh shuffle matchingSimon Pilgrim2015-02-174-33/+56
| | | | | | | | Added commuted unpckl/unpckh shuffle matching patterns as many cases containing undefined lanes fail to commute by themselves. Differential Revision: http://reviews.llvm.org/D7564 llvm-svn: 229571
* Add comment to explain a non-obvious setting; NFC.Sanjay Patel2015-02-171-0/+6
| | | | | | | This is paraphrased from Simon Pilgrim's comment in: http://reviews.llvm.org/D7492 llvm-svn: 229566
* use a triple instead of a cpu; less builbot sadnessSanjay Patel2015-02-171-2/+2
| | | | llvm-svn: 229563
* remove function names from comments; NFCSanjay Patel2015-02-171-38/+31
| | | | llvm-svn: 229558
* replace meaningless variable names; NFCISanjay Patel2015-02-171-31/+31
| | | | llvm-svn: 229549
* Add code to llvm-objdump so the -section option with -macho will dump ↵Kevin Enderby2015-02-175-32/+278
| | | | | | | | | | | literal pointer sections with the Mach-O S_LITERAL_POINTERS section type. Also fix the printing of the leading addresses for literal sections to be consistent and not print the 0x prefix. Updated test cases to match. llvm-svn: 229548
* Re-apply "InstrProf: Use a test fixture in the coverage mapping tests"Justin Bogner2015-02-171-67/+81
| | | | | | | | | | This time we use a helper to format the assertion so we can just use ASSERT_TRUE instead of relying on ASSERT_EQ being able to deal with conversions between enum types. This reverts r229496, re-applying r229473. llvm-svn: 229547
* Add testcases I missed in r229541.Rafael Espindola2015-02-172-0/+54
| | | | llvm-svn: 229542
* Add r228980 back.Rafael Espindola2015-02-1710-29/+72
| | | | | | | | | | Add support for having multiple sections with the same name and comdat. Using this in combination with -ffunction-sections allows LLVM to output a .o file with mulitple sections named .text. This saves space by avoiding long unique names of the form .text.<C++ mangled name>. llvm-svn: 229541
* Add r228889 back.Rafael Espindola2015-02-171-31/+26
| | | | | | | | | | Original message: Invert the section relocation map. It now points from rel section to section. Use it to set sh_info, avoiding a brittle name lookup. llvm-svn: 229539
* Add r228888 back.Rafael Espindola2015-02-171-7/+3
| | | | | | | | Original message: Use the existing SymbolTableIndex instead of doing a lookup. NFC. llvm-svn: 229538
* Add r228886 back now that r229530 fixed the issue lldb was hitting.Rafael Espindola2015-02-171-47/+45
| | | | | | | | | | Original message: Create the Seciton -> Rel Section map when it is first needed. NFC. Saves a walk over every section. llvm-svn: 229536
* make basic block label matching more flexible for less sad buildbotsSanjay Patel2015-02-171-4/+4
| | | | llvm-svn: 229535
* R600/SI: Fix asam errors in SIFoldOperandsTom Stellard2015-02-173-5/+6
| | | | | | | We were trying to fold into implicit uses, which led to out of bounds access of the MCInstrDesc::OpInfo arrray. llvm-svn: 229533
* prevent folding a scalar FP load into a packed logical FP instruction (PR22371)Sanjay Patel2015-02-175-21/+120
| | | | | | | | | | | | | | | | Change the memory operands in sse12_fp_packed_scalar_logical_alias from scalars to vectors. That's what the hardware packed logical FP instructions define: 128-bit memory operands. There are no scalar versions of these instructions...because this is x86. Generating the wrong code (folding a scalar load into a 128-bit load) is still possible using the peephole optimization pass and the load folding tables. We won't completely solve this bug until we either fix the lowering in fabs/fneg/fcopysign and any other places where scalar FP logic is created or fix the load folding in foldMemoryOperandImpl() to make sure it isn't changing the size of the load. Differential Revision: http://reviews.llvm.org/D7474 llvm-svn: 229531
* Don't deference the section_end() iterator.Rafael Espindola2015-02-171-0/+3
| | | | | | Hard to test given the undefined behavior nature. llvm-svn: 229530
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