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* ARM: don't use a deleted node as the BaseReg in complex pattern.Tim Northover2015-12-092-1/+19
| | | | | | | | | | We mutated the DAG, which invalidated the node we were trying to use as a base register. Sometimes we got away with it, but other times the node really did get deleted before it was finished with. Should fix PR25733 llvm-svn: 255120
* WebAssembly: add missing failure to the list.JF Bastien2015-12-091-0/+1
| | | | llvm-svn: 255119
* Revert r255115 until we figure out how to fix the bot failures.Silviu Baranga2015-12-098-249/+164
| | | | llvm-svn: 255117
* [LV][LAA] Add a layer over SCEV to apply run-time checked knowledge on SCEV ↵Silviu Baranga2015-12-098-164/+249
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | expressions Summary: This change creates a layer over ScalarEvolution for LAA and LV, and centralizes the usage of SCEV predicates. The SCEVPredicatedLayer takes the statically deduced knowledge by ScalarEvolution and applies the knowledge from the SCEV predicates. The end goal is that both LAA and LV should use this interface everywhere. This also solves a problem involving the result of SCEV expression rewritting when the predicate changes. Suppose we have the expression (sext {a,+,b}) and two predicates P1: {a,+,b} has nsw P2: b = 1. Applying P1 and then P2 gives us {a,+,1}, while applying P2 and the P1 gives us sext({a,+,1}) (the AddRec expression was changed by P2 so P1 no longer applies). The SCEVPredicatedLayer maintains the order of transformations by feeding back the results of previous transformations into new transformations, and therefore avoiding this issue. The SCEVPredicatedLayer maintains a cache to remember the results of previous SCEV rewritting results. This also has the benefit of reducing the overall number of expression rewrites. Reviewers: mzolotukhin, anemet Subscribers: jmolloy, sanjoy, llvm-commits Differential Revision: http://reviews.llvm.org/D14296 llvm-svn: 255115
* Fix cycle in selection DAG introduced by extractelement legalizationRobert Lougher2015-12-092-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | During selection DAG legalization, extractelement is replaced with a load instruction. To do this, a temporary store to the stack is used unless an existing store is found that can be re-used. If re-using a store, the chain going out of the store must be replaced by the one going out of the new load (this ensures that any stores that must take place after the store happens after the load, else the value might be overwritten before it is loaded). The problem is, if the extractelement index is dependent on the store replacing the chain will introduce a cycle in the selection DAG (the load uses the index, and by replacing the chain we will make the index dependent on the load). To fix this, if the index is dependent on the store, the store is skipped. This is conservative as we may end up creating an unnecessary extra store to the stack. However, the situation is not expected to occur very often. Differential Revision: http://reviews.llvm.org/D15330 llvm-svn: 255114
* [AArch64] Fix FP16 vector instructions that should only accept low registersOliver Stannard2015-12-092-3/+43
| | | | llvm-svn: 255113
* [mips][ias] Range check uimm10 operandsDaniel Sanders2015-12-097-28/+33
| | | | | | | | | | | | Summary: Reviewers: vkalintiris Subscribers: dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D15229 llvm-svn: 255112
* WebAssembly: add known failuresJF Bastien2015-12-092-2/+444
| | | | | | The bots are now running the torture tests properly. Bin all failures from the GCC C torture tests so that we can tackle failures and make the tree go red on regressions. llvm-svn: 255111
* [mips] Use multiclass patterns for f32/f64 comparisons and i32 selects.Vasileios Kalintiris2015-12-091-75/+69
| | | | | | | | | | | | | | | Summary: Although the multiclass for i32 selects might seem redundant as it has only one instantiation, we will use it to replace the correspondent patterns in Mips64r6InstrInfo.td in follow-up commits. Reviewers: dsanders Subscribers: llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D14612 llvm-svn: 255110
* Revert r254897 "[mips][microMIPS] Implement LH, LHE, LHU and LHUE instructions"Zlatko Buljan2015-12-0911-113/+10
| | | | | | | | | Commited patch was intended to implement LH, LHE, LHU and LHUE instructions. After commit test-suite failed with error message in the form of: fatal error: error in backend: Cannot select: t124: i32,ch = load<LD2[%d](tbaa=<0x94acc48>), sext from i16> t0, t2, undef:i32 For that reason I decided to revert commit r254897 and make new patch which besides implementation and standard regression tests will also have dedicated tests (CodeGen) for the above error. llvm-svn: 255109
* EarlyCSE: fix typo from rL255054.JF Bastien2015-12-091-1/+1
| | | | llvm-svn: 255102
* Revert "Implement a new pass - LiveDebugValues - to compute the set of live ↵Mehdi Amini2015-12-0914-1132/+5
| | | | | | | | | | | DEBUG_VALUEs at each basic block and insert them. Reviewed and accepted at: http://reviews.llvm.org/D11933" This reverts commit r255096. Break the bots: http://lab.llvm.org:8080/green/job/clang-stage1-cmake-RA-incremental_check/16378/ From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 255101
* The current importing scheme is processing one function at a time,Mehdi Amini2015-12-091-54/+144
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | loading the source Module, linking the function in the destination module, and destroying the source Module before repeating with the next function to import (potentially from the same Module). Ideally we would keep the source Module alive and import the next Function needed from this Module. Unfortunately this is not possible because the linker does not leave it in a usable state. However we can do better by first computing the list of all candidates per Module, and only then load the source Module and import all the function we need for it. The trick to process callees is to materialize function in the source module when building the list of function to import, and inspect them in their source module, collecting the list of callees for each callee. When we move the the actual import, we will import from each source module exactly once. Each source module is loaded exactly once. The only drawback it that it requires to have all the lazy-loaded source Module in memory at the same time. Currently this patch already improves considerably the link time, a multithreaded link of llvm-dis on my laptop was: real 1m12.175s user 6m32.430s sys 0m10.529s and is now: real 0m40.697s user 2m10.237s sys 0m4.375s Note: this is the full link time (linker+Import+Optimizer+CodeGen) Differential Revision: http://reviews.llvm.org/D15178 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 255100
* Implement a new pass - LiveDebugValues - to compute the set of live ↵Vikram TV2015-12-0914-5/+1132
| | | | | | DEBUG_VALUEs at each basic block and insert them. Reviewed and accepted at: http://reviews.llvm.org/D11933 llvm-svn: 255096
* Test commit access - Fix few missing '.' in comments of LoopInterchange code.Vikram TV2015-12-091-4/+4
| | | | llvm-svn: 255095
* Fix the order of destructors in LibLTOCodeGeneratorSteven Wu2015-12-092-0/+6
| | | | | | | | | | | | | | | | Summary: The order of destructors in LTOCodeGenerator gets changed in r254696. It is possible for LTOCodeGenerator to have a MergedModule created in the OwnedContext, in which case the module must be destructed before the context. Reviewers: rafael, dexonsmith Subscribers: llvm-commits, joker.eph Differential Revision: http://reviews.llvm.org/D15346 llvm-svn: 255092
* [AArch64][ARM] Don't base interleaved op legality on type alloc size.Ahmed Bougacha2015-12-096-15/+91
| | | | | | | | | | | | | | | | | | | | | | | | | | Otherwise, we think that most types that look like they'd fit in a legal vector type are legal (so, basically, *any* vector type with a size between 33 and 128 bits, I think, since we use pow2 alignment; e.g., v2i25, v3f32, ...). DataLayout::getTypeAllocSize rounds up based on alignment. When checking for target intrinsic legality, that's not what we want: if rounding makes a difference, the type isn't legal, and the target intrinsics shouldn't be used, as they are always assumed legal. One could make the argument that alloc size is ultimately the most relevant here, since we're dealing with LD/ST intrinsics. That's only true if we did legalize them though; that's a problem for another day. Use DataLayout::getTypeSizeInBits instead of getTypeAllocSizeInBits. Type::getSizeInBits can't be used because that'd gratuitously break pointer vector support. Some of these uses are currently fine, because we only hit them when the type is already known legal (e.g., r114454). Update them for consistency. It's faster to avoid the rounding anyway! llvm-svn: 255089
* Don't drop attributes when inlining through "deopt" operand bundlesSanjoy Das2015-12-092-0/+41
| | | | | | | Test case attached (test case also checks that we don't drop the calling convention, but that functionality was correct before this patch). llvm-svn: 255088
* Simplify testMergedProgram.Rafael Espindola2015-12-091-26/+19
| | | | | | It now receives and returns std::unique_ptr. llvm-svn: 255087
* Simplify memory management. NFC.Rafael Espindola2015-12-091-79/+72
| | | | | | | This passes std::unique_ptr to predicates that are expected to delete their argument. llvm-svn: 255086
* Return std::unique_ptr from SplitFunctionsOutOfModule. NFC.Rafael Espindola2015-12-093-30/+25
| | | | llvm-svn: 255084
* Simplify memory management. NFC.Rafael Espindola2015-12-091-11/+10
| | | | llvm-svn: 255082
* X86-FMA3: Defined the ExeDomain property for Scalar FMA3 opcodes.Vyacheslav Klochkov2015-12-095-67/+70
| | | | | | | Reviewer: Simon Pilgrim. Differential Revision: http://reviews.llvm.org/D15317 llvm-svn: 255080
* Simplify memory management a bit. NFC.Rafael Espindola2015-12-091-9/+8
| | | | llvm-svn: 255079
* Return a std::unique_ptr from CloneModule. NFC.Rafael Espindola2015-12-086-40/+42
| | | | llvm-svn: 255078
* [IndVars] Use any_of and foreach instead of explicit for loops; NFCSanjoy Das2015-12-081-11/+6
| | | | llvm-svn: 255077
* [OperandBundles] Have PruneEH work correct with operand bundles.Sanjoy Das2015-12-082-2/+33
| | | | | | | | For an invoke with operand bundles, the [op_begin(), op_end()-3] range can contain things other than invoke arguments. This change teaches PruneEH to use arg_begin() and arg_end() explicitly. llvm-svn: 255073
* Define selection for v4f16, v8f16 scalar_to_vectorPirama Arumuga Nainar2015-12-083-0/+23
| | | | | | | | | | | | | | | | | | Summary: This fixes failure when trying to select insertelement <4 x half> undef, half %a, i64 0 which gets transformed to a scalar_to_vector node. The accompanying v4 and v8 tests fail instruction selection without this patch. Reviewers: ab, jmolloy Subscribers: srhines, llvm-commits Differential Revision: http://reviews.llvm.org/D15322 llvm-svn: 255072
* Fix/Improve Debug print in FunctionImport passMehdi Amini2015-12-081-9/+12
| | | | | From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 255071
* [CGP] Reimplement r255055 a different wayReid Kleckner2015-12-082-0/+61
| | | | llvm-svn: 255070
* [SCEV] Use for-each; NFCSanjoy Das2015-12-081-19/+13
| | | | llvm-svn: 255069
* Remove caching in FunctionImport: a Module can't be reused after being ↵Mehdi Amini2015-12-082-43/+20
| | | | | | | | | linked from The Linker destroys the source module (API change coming to make it explicit) From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 255064
* Revert "[CGP] Check that we have an insert point before moving ↵Reid Kleckner2015-12-082-65/+4
| | | | | | | | | | llvm.dbg.value around" This reverts commit r255055. Breakage has been reported. llvm-svn: 255063
* [OperandBundles] Fix a transform in simplifycfgSanjoy Das2015-12-082-2/+19
| | | | | | | | | | Reviewers: pcc, majnemer, reames Subscribers: reames, llvm-commits Differential Revision: http://reviews.llvm.org/D15345 llvm-svn: 255062
* [X86][AVX] Fold loads + splats into broadcast instructionsSimon Pilgrim2015-12-085-75/+45
| | | | | | | | | | | | On AVX and AVX2, BROADCAST instructions can load a scalar into all elements of a target vector. This patch improves the lowering of 'splat' shuffles of a loaded vector into a broadcast - currently the lowering only works for cases where we are splatting the zero'th element, which is now generalised to any element. Fix for PR23022 Differential Revision: http://reviews.llvm.org/D15310 llvm-svn: 255061
* [CMake] Ignore externalizing debuginfo for unit testsChris Bieneman2015-12-081-3/+5
| | | | | | If you externalize debug info for unit tests the test runner finds the mach-o inside the dsym bundle and tries to execute it as a test. llvm-svn: 255056
* [CGP] Check that we have an insert point before moving llvm.dbg.value aroundReid Kleckner2015-12-082-4/+65
| | | | llvm-svn: 255055
* [EarlyCSE] Value forwarding for unordered atomicsPhilip Reames2015-12-082-19/+204
| | | | | | | | | | | | This patch teaches the fully redundant load part of EarlyCSE how to forward from atomic and volatile loads and stores, and how to eliminate unordered atomics (only). This patch does not include dead store elimination support for unordered atomics, that will follow in the near future. The basic idea is that we allow all loads and stores to be tracked by the AvailableLoad table. We store a bit in the table which tracks whether load/store was atomic, and then only replace atomic loads with ones which were also atomic. No attempt is made to refine our handling of ordered loads or stores. Those are still treated as full fences. We could pretty easily extend the release fence handling to release stores, but that should be a separate patch. Differential Revision: http://reviews.llvm.org/D15337 llvm-svn: 255054
* [X86][SSE4A] Added fast-isel intrinsics testsSimon Pilgrim2015-12-081-0/+98
| | | | | | As discussed on PR24580, this patch adds fast-isel codegen tests to match the IR generated in clang/test/CodeGen/sse4a-builtins.c llvm-svn: 255053
* [X86][SSSE3] Added fast-isel intrinsics testsSimon Pilgrim2015-12-081-0/+290
| | | | | | As discussed on PR24580, this patch adds fast-isel codegen tests to match the IR generated in clang/test/CodeGen/ssse3-builtins.c llvm-svn: 255052
* [X86][SSE3] Added fast-isel intrinsics testsSimon Pilgrim2015-12-081-0/+171
| | | | | | As discussed on PR24580, this patch adds fast-isel codegen tests to match the IR generated in clang/test/CodeGen/sse3-builtins.c llvm-svn: 255051
* Fix ARMv4T (Thumb1) epilogue generationArtyom Skrobov2015-12-085-95/+132
| | | | | | | | | | | | | | Summary: Before ARMv5T, Thumb1 code could not pop PC, as described at D14357 and D14986; so we need the special fixup in the epilogue. Reviewers: jroelofs, qcolombet Subscribers: aemerson, llvm-commits, rengolin Differential Revision: http://reviews.llvm.org/D15126 llvm-svn: 255047
* Revert "Add Available Externally linkage type to isWeakForLinker()"Mehdi Amini2015-12-082-24/+1
| | | | | | | This reverts r255043, as per post-review concern were raised on the correctness. From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 255045
* Cleanup test: remove useless alignmentMehdi Amini2015-12-081-2/+2
| | | | | From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 255044
* Add Available Externally linkage type to isWeakForLinker()Mehdi Amini2015-12-082-1/+24
| | | | | | | | | | | | | | Per LangRef: "Globals with available_externally linkage are allowed to be discarded at will, and are otherwise the same as linkonce_odr", since linkonce_odr is in this list it makes sense to have available_externally there as well. Reviewers: rafael Differential Revision: http://reviews.llvm.org/D15323 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 255043
* X86: produce more friendly errors during MachO relocation handlingTim Northover2015-12-083-32/+94
| | | | llvm-svn: 255036
* [ARM] Allowing SP/PC for AND/BIC mod_imm_notRenato Golin2015-12-082-4/+15
| | | | | | | AND/BIC instructions do accept SP/PC, so the register class should be more generic (rGPR -> GPR) to cope with that case. Adding more tests. llvm-svn: 255034
* adding readability-identifier-naming to llvm clang-tidy configuration.Mike Aizatsky2015-12-081-1/+13
| | | | | | Differential Revision: http://reviews.llvm.org/D15196 llvm-svn: 255028
* [Hexagon] Add NewValueJump support for C4_cmpneq, C4_cmplte, C4_cmplteuRon Lieberman2015-12-082-0/+107
| | | | llvm-svn: 255027
* Move all private members together. NFC.Rafael Espindola2015-12-081-23/+22
| | | | llvm-svn: 255021
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