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* MachineVerifier: Allow physreg use if just a subreg is defined.Matthias Braun2014-12-101-1/+12
| | | | | | | | We can't mark partially undefined registers, so we have to allow reading a register in the machine verifier if just parts of a register are defined. llvm-svn: 223896
* MachineVerifier: Allow LiveInterval segments to end at a partial write.Matthias Braun2014-12-101-2/+10
| | | | | | | | In the subregister liveness tracking case we do not create implicit reads on partial register writes anymore, still we need to produce a new SSA value for partial writes so the live segment has to end. llvm-svn: 223895
* VirtRegMap: Improve block live-in info if subregister liveness is available.Matthias Braun2014-12-101-9/+32
| | | | llvm-svn: 223894
* MCRegisterInfo: Add MCSubRegIndexIterator.Matthias Braun2014-12-101-0/+33
| | | | | | | This iterator iterates over subregister and their associated subregister indices at the same time. llvm-svn: 223893
* VirtRegMap: No implicit defs/uses for super registers with subreg liveness ↵Matthias Braun2014-12-102-5/+33
| | | | | | | | | | | | | tracking. Adding the implicit defs/uses to the superregisters is semantically questionable but was not dangerous before as the register allocator never assigned the same register to two overlapping LiveIntervals even when the actually live subregisters do not overlap. With subregister liveness tracking enabled this does actually happen and leads to subsequent bugs if we don't stop adding the superregister defs/uses. llvm-svn: 223892
* LiveRegMatrix: Respect subregister liveness when allocating registers.Matthias Braun2014-12-101-14/+49
| | | | llvm-svn: 223891
* LiveIntervalUnion: Allow specification of liverange when unifying/extracting.Matthias Braun2014-12-102-11/+17
| | | | | | This allows it to add subregister ranges into the union. llvm-svn: 223890
* Tablegen'erate lanemasks for register units.Matthias Braun2014-12-104-6/+125
| | | | | | Now we can relate lanemasks in a virtual register to register units. llvm-svn: 223889
* RegisterCoalescer: Preserve subregister liveranges.Matthias Braun2014-12-102-126/+565
| | | | llvm-svn: 223888
* LiveInterval: Add removeEmptySubRanges().Matthias Braun2014-12-102-0/+21
| | | | llvm-svn: 223887
* LiveIntervalAnalysis: Add subregister aware variants pruneValue().Matthias Braun2014-12-103-15/+32
| | | | llvm-svn: 223886
* LiveInterval: Introduce LiveQuery accessor for dead or live out values.Matthias Braun2014-12-101-0/+6
| | | | llvm-svn: 223885
* Add a flag to enable/disable subregister liveness.Matthias Braun2014-12-105-3/+27
| | | | llvm-svn: 223884
* LiveIntervalAnalysis: Adapt repairIntervalsInRange() to subregister liveness.Matthias Braun2014-12-102-77/+101
| | | | llvm-svn: 223883
* LiveRangeEdit: Adapt eliminateDeadDef() to subregister liveness.Matthias Braun2014-12-101-1/+9
| | | | llvm-svn: 223882
* LiveIntervalAnalysis: Adapt handleMove() to subregister ranges.Matthias Braun2014-12-101-16/+30
| | | | llvm-svn: 223881
* LiveIntervalAnalysis: Update SubRanges in shrinkToUses().Matthias Braun2014-12-102-80/+160
| | | | llvm-svn: 223880
* LiveIntervalAnalysis: Make computeDeadValues() private.Matthias Braun2014-12-101-11/+9
| | | | llvm-svn: 223879
* LiveIntervalAnalysis: Compute subregister ranges.Matthias Braun2014-12-102-100/+258
| | | | llvm-svn: 223878
* LiveInterval: Add support to track liveness of subregisters.Matthias Braun2014-12-106-32/+246
| | | | | | This code adds the required data structures. Algorithms to compute it follow. llvm-svn: 223877
* LiveInterval: Add a 'covers' operation to LiveRange.Matthias Braun2014-12-102-0/+27
| | | | llvm-svn: 223876
* LiveInterval: Add const version of LiveRange::advanceTo().Matthias Braun2014-12-101-0/+8
| | | | llvm-svn: 223875
* Add function that translates subregister lane masks to other subregs.Matthias Braun2014-12-104-1/+190
| | | | | | | This works like the composeSubRegisterIndices() function but transforms a subregister lane mask instead of a subregister index. llvm-svn: 223874
* Let tablegen compute maximum lanemask for regs/regclasses.Matthias Braun2014-12-104-5/+28
| | | | | | | | Let tablegen compute the combination of subregister lanemasks for all subregisters in a register/register class. This is preparation for further work subregister allocation llvm-svn: 223873
* AsmParser: Don't crash if a null byte is inside a quoted stringDavid Majnemer2014-12-103-52/+34
| | | | | | | We don't allow Value* to have names which contain null bytes. The AsmParser should reject .ll files that try to do this. llvm-svn: 223869
* Extend some comments around GCModuleInfo, GCFunctionInfo, & GCStrategyPhilip Reames2014-12-102-5/+8
| | | | | | Nothing particularly interesting here, just documenting the way the code currently works before I start changing it... llvm-svn: 223866
* cmake: Make SVNVersion.inc work on Windows if svn is called svn.bat.Nico Weber2014-12-101-0/+5
| | | | llvm-svn: 223864
* Simplify the handling of aliases in the gold plugin.Rafael Espindola2014-12-101-49/+33
| | | | | | | | | | | | | | | The complicated situation is when we have to keep an alias but drop a GV that is part of the aliasee. We used to clone the dropped GV and make the clone internal. This is wasteful as we know the original will be dropped. With this patch what is done instead is set the linkage of the original to internal and replace all uses (but the one in the alias) with a new declaration that takes the name of the old GV. This saves us from having to copy the body. llvm-svn: 223863
* [ARM] Combine base-updating/post-incrementing vector load/stores.Ahmed Bougacha2014-12-106-27/+421
| | | | | | | | | | | | | | | | | | We used to only combine intrinsics, and turn them into VLD1_UPD/VST1_UPD when the base pointer is incremented after the load/store. We can do the same thing for generic load/stores. Note that we can only combine the first load/store+adds pair in a sequence (as might be generated for a v16f32 load for instance), because other combines turn the base pointer addition chain (each computing the address of the next load, from the address of the last load) into independent additions (common base pointer + this load's offset). Differential Revision: http://reviews.llvm.org/D6585 llvm-svn: 223862
* Remove the Module pointer from GCStrategy and GCMetadataPrinterPhilip Reames2014-12-097-27/+19
| | | | | | | | | | | | | | | | In the current implementation, GCStrategy is a part of the ownership structure for the gc metadata which describes a Module. It also contains a reference to the module in question. As a result, GCStrategy instances are essentially Module specific. I plan to transition away from this design. Instead, a GCStrategy will be owned by the LLVMContext. It will be a lightweight policy object which contains no information about the Modules or Functions involved, but can be easily reached given a Function. The first step in this transition is to remove the direct Module reference from GCStrategy. This also requires removing the single user of this reference, the GCMetadataPrinter hierarchy. In theory, this will allow the lifetime of the printers to be scoped to the LLVMContext as well, but in practice, I'm not actually changing that. (Yet?) An alternate design would have been to move the direct Module reference into the GCMetadataPrinter and change the keying of the owning maps to explicitly key off both GCStrategy and Module. I'm open to doing it that way instead, but didn't see much value in preserving the per Module association for GCMetadataPrinters. The next change in this sequence will be to start unwinding the intertwined ownership between GCStrategy, GCModuleInfo, and GCFunctionInfo. Differential Revision: http://reviews.llvm.org/D6566 llvm-svn: 223859
* IR: Fix memory corruption in MDNode new/deleteDuncan P. N. Exon Smith2014-12-091-4/+8
| | | | | | | | | | | | | | | There were two major problems with `MDNode` memory management. 1. `MDNode::operator new()` called a placement array constructor for `MDOperand`. What? Each operand needs to be placed individually. 2. `MDNode::operator delete()` failed to destruct the `MDOperand`s at all. Frankly it's hard to understand how this worked locally, how this survived an LTO bootstrap, or how it worked on most of the bots. llvm-svn: 223858
* Forgot to add test for r223856David Majnemer2014-12-091-0/+4
| | | | llvm-svn: 223857
* AsmParser: Verifier that the contents of a hex integer are hexDavid Majnemer2014-12-091-1/+7
| | | | llvm-svn: 223856
* Rename static functiom "map" to be more descriptive and to avoidKaelyn Takata2014-12-091-5/+5
| | | | | | potential confusion with the std::map type. llvm-svn: 223853
* IR: Metadata: Detect an RAUW recursionDuncan P. N. Exon Smith2014-12-092-2/+12
| | | | | | | | | | Speculatively handle a recursion in `GenericMDNode::handleChangedOperand()`. I'm hoping this fixes the failing hexagon bot [1]. [1]: http://lab.llvm.org:8011/builders/llvm-hexagon-elf/builds/13434 llvm-svn: 223849
* Remove redundant variable.Michael Zolotukhin2014-12-091-4/+2
| | | | | | | Tested by adding assert(LoopVectorPreHeader == VecPreheader) on LLVM test suite and SPECs. llvm-svn: 223847
* [Hexagon] [NFC] Cleaning up unused classes.Colin LeMahieu2014-12-091-30/+0
| | | | llvm-svn: 223845
* [ARM] Make testcase more explicit. NFC.Ahmed Bougacha2014-12-091-30/+49
| | | | llvm-svn: 223841
* [ARM] Factor out base-updating VLD/VST combiner function. NFC.Ahmed Bougacha2014-12-091-6/+15
| | | | | | | | | Move the combiner-state check into another function, add a few small comments, and use a more general type in a cast<>. In preparation for a future patch. llvm-svn: 223834
* [ARM] Move the store combiner function down. NFC.Ahmed Bougacha2014-12-091-141/+143
| | | | | | | And flip its final condition. In preparation for a future patch. llvm-svn: 223833
* [ARM] Also support v2f64 vld1/vst1.Ahmed Bougacha2014-12-093-0/+21
| | | | | | | | | It was missing from the VLD1/VST1 handling logic, even though the corresponding instructions exist (same form as v2i64). In preparation for a future patch. llvm-svn: 223832
* IR: Metadata/Value split: RAUW in a deterministic orderDuncan P. N. Exon Smith2014-12-092-22/+41
| | | | | | | | | | | RAUW in a deterministic order to try to recover the hexagon bot [1], whose tests started failing once my GCC fixes were in for r223802. Otherwise, I'm not sure why tests would fail there and not here. [1]: http://lab.llvm.org:8011/builders/llvm-hexagon-elf/builds/13426 llvm-svn: 223829
* Return ErrorOr<std::unique_ptr<Archive>> form getAsArchive.Rafael Espindola2014-12-095-33/+36
| | | | | | This is the same return type of Archive::create. llvm-svn: 223827
* Try fixing MSVC build after r223802Hans Wennborg2014-12-093-4/+1
| | | | | | | | | | | LLVM_EXPLICIT is only supported by recent version of MSVC, and it seems the not-so-recent versions get confused about the operator bool() when tryint to resolve operator== calls. This removed the operator bool()'s since they don't seem to be used anyway. llvm-svn: 223824
* [Hexagon] Fixing broken tests.Colin LeMahieu2014-12-093-14/+15
| | | | llvm-svn: 223823
* Rename createIRObjectFile to just create.Rafael Espindola2014-12-094-8/+8
| | | | | | | It is a static method of IRObjectFile, so having to use IRObjectFile::createIRObjectFile was redundant. llvm-svn: 223822
* [Hexagon] Updating rr/ri 32/64 transfer encodings and adding tests.Colin LeMahieu2014-12-0911-178/+216
| | | | llvm-svn: 223821
* Fix an MSVC failure from r223802Duncan P. N. Exon Smith2014-12-091-0/+6
| | | | llvm-svn: 223820
* [FastISel][AArch64] Fix a missing nullptr check in 'computeAddress'.Juergen Ributzka2014-12-092-1/+16
| | | | | | | | | The load/store value type is currently not available when lowering the memcpy intrinsic. Add the missing nullptr check to support this in 'computeAddress'. Fixes rdar://problem/19178947. llvm-svn: 223818
* [Hexagon] Adding word combine dot-new form and replacing old combine opcode.Colin LeMahieu2014-12-096-80/+57
| | | | llvm-svn: 223815
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